Datasheet

OUT SFC
g
V I
t C
D
@
D
IN12
12
PASS
OUT12
R
SENSE
TPS2458
C
R > 1 kW
100 W
25V
Gnd
10 m V
- 3 mV
V
GATE
V
OR
TPS2458
SLUS916B –FEBRUARY 2009–REVISED MAY 2010 www.ti.com
12-V Inrush Slew Rate Control
Although it is possible to slow the gate slew rate it is very unlikely that would be necessary since the TPS2458
limits inrush current at turn on. The limit level is programmed by the user.
As normally configured, the turn-on slew rate of the 12-V channel output voltage V
OUT
is shown in Equation 8.
(8)
where I
src
equals the current sourced by the PASS pin (nominally 30 mA) and Cg equals the effective gate
capacitance. For purposes of this computation, the effective gate capacitance approximately equals the reverse
transfer capacitance, C
rss
. To reduce the slew rate, increase C
g
by connecting additional capacitance from PASS
to ground. Place a resistor of at least 1000 Ω in series with the additional capacitance to prevent it from
interfering with the fast turn off of the FET.
Figure 21. RC Slew Rate Control
12-V ORing Operation for Redundant Systems
The 12-V channels use external pass FETs to provide reverse blocking. The TPS2458 pulls the BLK pin high
when the input-to-output differential voltage VIN12–OUT12 exceeds a nominal value of 10 mV, and it pulls the
pin low when this differential falls below a nominal value of –3 mV. These thresholds provide a nominal 13 mV of
hysteresis to help prevent false triggering (Figure 21).
The source of the blocking FET connects to the source of the pass FET, and the drain of the blocking FET
connects to the load. This orients the body diode of the blocking FET such that it conducts forward current and
blocks reverse current. The body diode of the blocking FET does not normally conduct current because the FET
turns on when the voltage differential across it exceeds 10 mV.
Figure 22. ORing Thresholds
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