Datasheet

80.6k
C
OUT
0
.
5
6
u
F
2
VIN
LOAD MIN
LIM _ MIN
V
R R
4 P
> =
´
2
MIN LIM _ MIN VIN
4 R P V´ ´ >
TPS2421-1
TPS2421-2
SLUS907G –JANUARY 2009–REVISED MAY 2013 www.ti.com
(9)
(10)
Enable Pin Considerations
For the case when EN is simply connected to GND, TPS2421 will start ramping the voltage on VOUT as VIN
rises above UVLO (~2.85V typical). If IN does not ramp monotonically, the TPS2421 may momentarily turn off
then on during startup if IN falls below ~2.70V. To avoid this problem, EN assertion can be delayed until IN is
sufficiently above UVLO. A simple approach is shown in Figure 20. The 100kΩ pullup resistor will de-assert EN
when VIN is above ~1.75V maximum which is well below the minimum UVLO of ~2.6V. The Zener diode ensures
that EN remains below 5V. User control to enable the TPS2421 can be applied at the ON node to turn on the
FET once IN has risen sufficiently above UVLO.
Figure 20. EN Delay Circuit
Fault Timer
The fault timer is active when the TPS2421 is in SOA protect mode or the current is above I
SET
. Figure 21
illustrates operation during non-faulted start up (C
OUT
=470 µF and I
VOUT
= 1A in a 12V system). C
CT
charges at
~35µA until TPS2421 exits SOA protect mode, discharges quickly (~40µA) to ~0.16V, and then decays slowly
(~1.4µA) towards zero.
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