Datasheet

3
2
4 5 6
7
1
8
0.56 µF
C
LOAD
80.6 k
4.6 VON
FET
100 k
Optional:
To System
Monitor
VIN
EN
GND ISET CT
PG
FLT
VOUT
12-V Bus
TPS2421
2 2
VIN VIN
LOAD MIN
LIM _ MIN
V V
R R
4 P 12
> = =
´
2
MIN LIM _ MIN VIN
4 R P V´ ´ >
TPS2421-1
TPS2421-2
SLUS907H –JANUARY 2009–REVISED JANUARY 2014 www.ti.com
(9)
(10)
Enable Pin Considerations
For the case when EN is simply connected to GND, the TPS2421 device starts ramping the voltage on VOUT as
VIN rises above UVLO (approximately 2.85 V typical). If IN does not ramp monotonically, the TPS2421 may
momentarily turn off then on during startup if IN falls below approximately 2.7 V. To avoid this problem, EN
assertion can be delayed until IN is sufficiently above UVLO. A simple approach is shown in Figure 20. The 100-
kΩ pullup resistor will de-assert EN when VIN is above approximately 1.75 V maximum which is well below the
minimum UVLO of approximately 2.6 V. The Zener diode ensures that EN remains below 5V. User control to
enable the TPS2421 device is applied at the ON node to turn on the FET once IN has risen sufficiently above
UVLO.
Figure 20. EN Delay Circuit
Fault Timer
The fault timer is active when the TPS2421 device is in SOA protect mode or the current is above I
SET
. Figure 21
illustrates operation during non-faulted start up (C
LOAD
= 470 µF and I
VOUT
= 1 A in a 12 V system). C
CT
charges
at approximately 35 µA until TPS2421 device exits SOA protect mode, discharges quickly (approximately 40 µA)
to approximately 0.16 V, and then decays slowly (approximately 1.4 µA) towards zero.
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