Datasheet

I
(TURN_OFF)
=- 1 A
V
(THRESHOLD)
r
DS(on)
-10mV
10mW
I
(TURN_OFF)
=
I
(TURN_OFF)
=
EN
A C
GND
GATE
V
IN
2200pF
BYP
V
OUT
R
GATE2
R
GATE1
61.9kW
RSET
0.47mF
0.47mF
M1, M2
CSD16401
“1”
0.47mF
TPS2419
www.ti.com SLVS998B –FEBRUARY 2010–REVISED SEPTEMBER 2011
To obtain a -10 mV turnoff ( V
(A)
is less than V
(C)
by 10 mV ), R
(RSET)
= (–470.02/ ( –0.01–0.00314) ) ≈ 35.7 kΩ. If
a 10 mΩ r
DS(on)
MOSFET was used, the reverse turnoff current would be calculated as follows.
(3)
The sign indicates that the current is reverse, or flows from the MOSFET drain to source ( C to A ).
The turn-off speed of a MOSFET is influenced by the effective gate-source and gate-drain capacitance C
ISS
).
Since these capacitances vary a great deal between different vendor parts and technologies, they should be
considered when selecting a MOSFET where the fastest turn-off is desired.
GATE DRIVE, CHARGE PUMP AND C
(BYP)
Gate drive of 290 μA typical is generated by an internal charge pump and current limiter. Make sure to use low
impedance traces and good bypass on A and C to avoid having the large charge pump currents interfere with
voltage sensing. The GATE drive voltage is referenced to V
(A)
as GATE will only be driven high when V
(A)
> V
(C)
.
The capacitor on BYP (bypass) must be used in order to form a quiet supply for the internal high-speed
comparator.
Gate Drive Resistance and Output Transients
The strong gate (pulsed) pull-down current can turn the ORing MOSFET(s) off in the 100 - 200 ns time frame.
While this serves to rapidly stop the reverse current buildup, it has a side effect of inducing a voltage transient on
the input bus, the output bus, and ground. One transient source is the GATE turn-off current itself, which excites
parasitic L-C tank circuits. A second transient source is the energy stored in power bus inductance driving a
voltage surge and ringing as reverse MOSFET current is interrupted. Both of these effects can be reduced by
limiting the GATE discharge current with a series resistor in the 10 Ω to 200 Ω range. This both reduces the peak
discharge current, and slows the MOSFET turnoff, reducing the di/dt. A careful tradeoff of peak reverse current
and the effects of the voltage transient may be required.
An example of turnoff speed with and without GATE resistance is illustrated by the circuit of Figure 13. Figure 14
and Figure 15 show GATE, the MOSFET gate, and V
C-ac
for similar turnoff transients and gate resistors of 0 Ω
and 51 Ω. A substancial reduction in noise is shown for a difference of 90ns in actual current termination. These
techniques may be used in conjunction with clamping and snubbing techniques discussed in RECOMMENDED
OPERATING RANGE. Figure 13 also demonstrates the filtering discussed in the next section.
Figure 13. Circuit for Gate Resistor Waveforms
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