Datasheet

SUMMARIZED DESIGN PROCEDURE
UV
OV
V
DD
A
C
GND
GATE
R SET
FLTR
PG
FLTB
STAT
Input
Voltage
Common
Voltage
BY P
R SV D
Logic
Voltage
See
Text
M1
OptionalLogic
Interface
R
(VDD)
10k
W
10kW
C
(FLTR)
C
(BYP)
C
(A)
C
(VDD)
R
(A)
R
(B)
R
(C)
R
(RSET)
Layout Considerations
TPS2410
TPS2411
SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com
The following is a summarized design procedure:
1. Choose between the TPS2410 or 2411, see TPS2410 vs TPS2411 – MOSFET Control Methods
2. Choose the V
DD
source. Table 3 provides a guide for where to connect V
DD
that covers most cases. V
DD
may
be directly connected to the supply, but an R
(VDD)
/ C
(VDD)
of 10 Ω / 0.01 µ F is recommended.
Table 3. V
DD
Connection Guide
V
A
< 3 V 3 V ≤ V
A
≤ 3.5 V V
A
> 3.5 V
Bias Supply > 3 V V
A
or Bias Supply > 3 V. V
C
if always > 3 V V
C
, V
A
or Bias for special configurations
3. Noise voltage and impedance at the A pin should be kept low. C
(A)
may be required if there is noise on the
bus, or A is not low impedance. If either of these is a concern, a C
(A)
of 0.01 µ F or more may be required.
4. Select C
(BYP)
as 2200 pF, X7R, 25-V or 50-V ceramic capacitor.
5. If the noise and transient environment is not well known, design C
(FLTR)
in, then experimentally determine if it
is required. Start with a 100 pF, X7R, 25-V or 50-V ceramic capacitor and adjust if necessary.
6. Select M1 based on considerations of voltage drop, power dissipated, voltage ratings, and gate capacitance.
See sections: MOSFET Selection and RSET and TPS2410 Regulation-Loop Stability.
7. Select R
(RSET)
based on which MOSFET was chosen and reverse current considerations – see MOSFET
Selection and RSET. If the noise and transient environment is not well known, make provision for R
(RSET)
even when using the TPS2410.
8. Configure the UV and OV inputs per the desired behavior – UV, OV, and PG. Calculate the resistor dividers.
9. Add optional interface for PG, FLTB, and STAT as desired.
10. Make sure to connect RSVD to ground.
Figure 21. Design Template
See Figure 21 for reference designations.
1. The TPS2410/11, M1, and associated components should be used over a ground plane.
2. The GND connection should be short with multiple vias to ground.
3. C
(VDD)
should be adjacent to the V
DD
pin with a minimal ground connection length to the plane.
4. The GATE connection should be short and wide (e.g., 0.025" minimum).
5. The C pin should be Kelvin connected to M1.
6. The A pin should be a short, wide, Kelvin connection to M1 and the bus.
7. C
(BYP)
, C
(FLTR)
, and R
(RSET)
should be kept immediately adjacent to the TPS2410/11 with short leads.
8. Do not run noisy signals adjacent to FLTR.
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