Datasheet
UV, OV, AND PG
Logic
Supply
BasicSupply
Monitoring
GND
Monitored Input Supply
UV
OV
PG
R
A
R
B
R
C
To
Monitor
P/O
TPS2410
Logic
Supply
GND
UV
OV
PG
To
Monitor
P/O
TPS2410
Logic
Supply
OVusedasanEnable
TPS2410
TPS2411
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.................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009
The UV and OV inputs can be used in a several ways. These include voltage monitoring and forcing the pass
MOSFET off.
A voltage bus may be monitored for undervoltage with the UV pin, and overvoltage with the OV pin. Figure 15
demonstrates a basic three resistor divider, however, two separate two resistor dividers may be used. PG is high
if V
(UV)
exceeds the UV threshold, and V
(OV)
is below the OV threshold, else PG is low. Each of these inputs has
a 0.6-V threshold and 7 mV of hysteresis. Optionally, UV and OV may be independently disabled by connecting
them to ground, and PG may be left floating if not used. The state of PG is undefined until the internal UVLO is
satisfied.
GATE is forced low if V
(OV)
exceeds 0.6 V. This allows OV to be used as an enable as shown in Figure 15 . This
can be used for testing purposes, or control of back-to-back MOSFETs to force an output off even though V
(AC)
is
greater than 10 mV.
Figure 15. UV, OV, AND PG
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