Datasheet

ManualsBrandsTEXAS INSTRUMENTS ManualsPMICsPMIC - OR controller, electrical elements n-channel TSSOP 14 N+1 OR controller

FEATURES

DESCRIPTION

APPLICATIONS

GND

GA TE

RSET

FL TR

(SET

)

FLTB

STAT

V ol tage Source

Note:ComponentsonRSET,FLTR,

UVandOVareOPTIONAL.

BY P

RSV D

Common V oltage Rail

A C

(BYP)

(FLTR)

TPS2410

TPS2411

www.ti.com

.................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009

Full Featured N+1 and ORing Power Rail Controller

• Control External FET for N+1 and ORing

The TPS2410/11 controller, in conjunction with an

• Wide Supply Voltage Range of 3 V to 16.5 V

external N-channel MOSFET, emulates the function

• Controls Buses From 0.8 V to 16.5 V

of a low forward-voltage diode. The TPS2410/11 can

• Linear or On/Off Control Method

be used to combine multiple power supplies to a

common bus in an N+1 configuration, or to combine

• Internal Charge Pump for N-Channel MOSFET

redundant input power buses. The TPS2410 provides

• Rapid Device Turnoff Protects Bus Integrity

a linear turn-on control while the TPS2411 has an

• Positive Gate Control on Hot Insertion

on/off control method.

• Soft Turn on Reduces Bus Transients

Applications for the TPS2410/11 include a wide range

• Input Voltage Monitoring

of systems including servers and telecom. These

applications often have either N+1 redundant power

• Shorted Gate Monitor

supplies, redundant power buses, or both. These

• MOSFET Control-State Indicator

redundant power sources must have the equivalent of

• Industrial Temperature Range: – 40 ° C to 85 ° C

a diode OR to prevent reverse current during faults

and hotplug. A TPS2410/11 and N-channel MOSFET

• Industry-Standard 14-Pin TSSOP Package

provide this function with less power loss than a

schottky diode.

• N+1 Power Supplies

Accurate voltage sensing, programmable fast turn-off

threshold, and input filtering allow operations to be

• Server Blades

tailored for a wide range of implementations and bus

• Telecom Systems

characteristics.

• High Availability Systems

A number of monitoring features are provided to

indicate voltage bus UV/OV, ON/OFF state, and a

shorted MOSFET gate.

Table 1. Family Features

TPS2410

TPS2411

TPS2412

TPS2413

Linear gate control √ √

ON/OFF gate control √ √

Adjustable turn-off threshold √ √ √ √

Fast comparator filtering √ √

Voltage monitoring √ √

Enable control √ √

Mosfet fault monitoring √ √

Status pin √ √

Figure 1. Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (32 pages)

PAGE 1
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 Full Featured N+1 and ORing Power Rail Controller FEATURES 1 • • • • • • • • • • • • • Control External FET for N+1 and ORing Wide Supply Voltage Range of 3 V to 16.5 V Controls Buses From 0.8 V to 16.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
PAGE 3
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 RECOMMENDED OPERATING CONDITIONS voltages are referenced to GND (unless otherwise noted) MIN VDD = V(C) (1) NOM MAX UNIT 3 16.5 0.8 16.5 0 5.25 V 6.8 mA 1.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com ELECTRICAL CHARACTERISTICS: TPS2410/11 (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STAT Sink current V(STAT) = 0.4 V, V(A) = V(C) + 0.
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TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 FUNCTIONAL BLOCK DIAGRAM + - 10 V VDD HVUV A Charge Pump and Bias Supply BYP ’10: AMP. ’11: COMP. + A GATE 10 mV 3 mV ON + - RSET - + - C 0.4 V EN + FLTR EN A FAST COMP. FLTB + - 0.75 V A 3 ms + - C 0.4 V UV o T > 135 C UVLO VDD STAT 0.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com PW PACKAGE (TOP VIEW) VDD RSET STAT FLTB OV UV GND PG BYP FLTR A C RSVD GATE TERMINAL FUNCTIONS TERMINAL NAME NO. I/O DESCRIPTION Input power for the gate drive charge pump and internal controls. VDD must be connected to a supply voltage ≥ 3 V.
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TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 DETAILED DESCRIPTION The following descriptions refer to the pinout and the functional block diagram. A, C: The A pin serves as the simulated diode anode and the C as the cathode. GATE is driven high when V(AC) exceeds 10 mV.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com RSET: A resistor connected from this pin to GND sets the MOSFET fast turn-off comparator threshold. The threshold is slightly positive when the RSET pin is left open. Current drawn by the resistor programs the turn-off voltage to increasing negative values.
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TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS TPS2410 V(AC) REGULATION VOLTAGE vs TEMPERATURE FAST TURNOFF THRESHOLD vs TEMPERATURE PULSED GATE SINKING CURRENT vs GATE VOLTAGE 3.0 5.0 12.0 R(RSET) = Open o TJ = -40 C 4.5 11.5 2.5 4.0 11.0 o TJ = 25 C 3.5 10.0 I(GATE) − A 10.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.
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TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 TYPICAL CHARACTERISTICS (continued) TURNOFF TIME WITH C(GATE) = 10 nF and V(AC) = -20 mV, VDD = VA = 12 V V(AC) V(GATE) at 5 V/div V(AC) at 20 mV/div I(GATE) at 2 A/div I(GATE GATE Delay = 68 ns, V(GATE) = 12 V at 103 ns 20 ns/div Figure 9.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com APPLICATION INFORMATION OVERVIEW The TPS2410/11 is designed to allow output ORing in N+1 power supply applications (see Figure 12) and input-power bus ORing in redundant source applications (see Figure 13).
PAGE 13
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 The operation of the two parts is summarized in Table 2. Table 2.
PAGE 14
TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com N+1 POWER SUPPLY – TYPICAL CONNECTION The N+1 power supply configuration shown in Figure 12 is used where multiple power supplies are paralleled for either higher capacity, redundancy or both.
PAGE 15
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 INPUT ORing – TYPICAL CONNECTION Figure 13 shows how redundant buses may be ORed to a common point to achieve higher reliability.
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TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com RECOMMENDED OPERATING RANGE The maximum recommended bus voltage is lower than the absolute maximum voltage ratings on A, C, and VDD solely to provide margin for transients on the bus. Most power systems experience transient voltages above the normal operating level.
PAGE 17
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 MOSFET SELECTION AND R(RSET) MOSFET selection criteria include voltage rating, voltage drop, power dissipation, size, and cost. The voltage rating consists of both the ability to withstand the rail voltage with expected transients, and the gate breakdown voltage.
PAGE 18
TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com GATE DRIVE, CHARGE PUMP AND C(BYP) Gate drive of 270 µA typical is generated by an internal charge pump and current limiter. A separate supply, VDD, is provided to avoid having the large charge pump currents interfere with voltage sensing by the A and C pins.
PAGE 19
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 UV, OV, AND PG The UV and OV inputs can be used in a several ways. These include voltage monitoring and forcing the pass MOSFET off. A voltage bus may be monitored for undervoltage with the UV pin, and overvoltage with the OV pin.
PAGE 20
TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com VDD, BYP, and POWERING OPTIONS The separate VDD pin provides flexibility for operational power and controlled rail voltage. While the internal UVLO has been set to 2.5 V, the TPS2410/1 requires at least 3 V to generate the specified GATE drive voltage.
PAGE 21
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 INPUT ORing AND STAT STAT provides information regarding the state of the MOSFET gate drive. STAT is pulled to VDD, through a 46-kΩ internal pullup, if GATE is being driven high and V(GATE) exceeds V(A) plus 0.4 V.
PAGE 22
TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com BIDIRECTIONAL BLOCKING AND PROTECTION OF C The TPS2410/11 may be used in applications where bidirectional blocking is desired. This may occur in situations where two different voltages are ORed together, and operation from the lower voltage is desired.
PAGE 23
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 ORing EXAMPLES Applications with the TPS2410/11 are not limited to ORIng of identical sections. The TPS2410/11 and external MOSFET form a general purpose function block. Figure 19 shows a circuit with ORing between a discrete diode and a TPS2410/MOSFET section.
PAGE 24
TPS2410 TPS2411 SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com SUMMARIZED DESIGN PROCEDURE The following is a summarized design procedure: 1. Choose between the TPS2410 or 2411, see TPS2410 vs TPS2411 – MOSFET Control Methods 2. Choose the VDD source. Table 3 provides a guide for where to connect VDD that covers most cases.
PAGE 25
TPS2410 TPS2411 www.ti.com .................................................................................................................................................. SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 Revision History Changes from Revision B (November, 2006) to Revision C .......................................................................................... Page • • • • • Changed STAT pullup voltage typo ................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2410PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TPS2411PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2410PWR TSSOP PW 14 2000 367.0 367.0 35.0 TPS2411PWR TSSOP PW 14 2000 367.0 367.0 35.
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