Datasheet

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SLUS536C − AUGUST 2002 − REVISED AUGUST 2004
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24
APPLICATION INFORMATION
using the PG output
The PG output is an indication of the load power status. PG is asserted after a load turn-on, once the load
voltage has ramped up to the input dc level, as indicated by a small VDS drop across the pass FET. The load
voltage is sensed by the DRAINSNS pin, which is connected to the pass FET drain through a small-signal
blocking diode. Also, the TPS2392 and TPS2393 first confirm that the full programmed sourcing current
(typically 40 mV/R
SENSE
) is available to the load electronics prior to declaring power good. The PG status is
latched once the power conditions are met, so that momentary current limiting operation due to input supply
transients is not reflected in this output status. This pin can be used to enable downstream converters, provide
a visual indication of load power good, or be level-translated or optocoupled to provide status reporting back
to the host controller.
When using PG to drive the enable input of a converter, care should be taken not to exceed the manufacturer’s
maximum voltage ratings for the pin. When asserted, the output driver pulls the PG pin to the −VIN pin potential.
Because this status in latched, subsequent current limit operation of the circuit could result in pulling the enable
input below the brick’s VIN− potential during the fault timeout period. If the brick does not provide an internal
clamp on this pin, a diode can be connected as shown in Figure 28 to externally limit the swing below VIN−.
In either case, a resistor (R7 in Figure 28) should be used to limit the current pulled from this pin, protecting
both the converter and the PG output. R7 should be large enough to limit the PG input current to less than
10 mA, while still allowing the brick enable to be pulled below its maximum V
IL
threshold.
10 µA
UDG−20177
GATE
ISENS
DRNSNS
RSENSE
VOUT+
VOUT−
VIN+
VIN−
DC/DC
CONVERTER
Q1
−VIN
D1
BAS19
RTN
D3
V
DD
R7
43 kΩ
TPS2392*
TPS2393*
C
IN
EN
−48 V
GND
PG
*Additional details omitted for clarity.
See block diagram on page 15 and 16 for pinout.
Figure 29. TPS2392/TPS2393 Active-Low Converter Enable