Datasheet
SLUS610 − JULY 2004
22
www.ti.com
APPLICATION INFORMATION
For example, assume the typical application design targets have been set to undervoltage turn-on at 33 V (input
supply rising), turn-off at 31 V (input voltage falling), and overvoltage shutdown at 72 V. Then equation (9) yields
R1 = 200 kΩ for the 2-V hysteresis. Once the value of R1 is selected, it is used to calculate resistors R2 and
R3.
R2 +
1.4 R1
ǒ
V
UV_L
* 1.4
Ǔ
ȧ
ȱ
Ȳ
1 *
V
UV_L
ǒ
V
OV_L
) 10
*5
R1
Ǔ
ȧ
ȳ
ȴ
R3 +
1.4 R1 V
UV_L
ǒ
V
UV_L
* 1.4
Ǔ
ǒ
V
OV_L
) 10
*5
R1
Ǔ
where:
D V
UV_L
is the UVLO threshold when the input supply is low; i.e., less than V
UV
D V
OV_L
is the OVLO threshold when the input supply is low; .i.e., less than V
OV
Again referring to the example schematic, equations (10) and (11) produce R2 = 4.909 kΩ (4.99 kΩ selected)
and R3 = 3.951 kΩ (3.92 kΩ selected), as shown. For the selected resistor values, the expected nominal supply
thresholds are as shown on the typical application diagram. The hysteresis on the overvoltage threshold, as
seen at the supply inputs, is given by the quantity (10 µA) * (R1 + R2). For the majority of applications, this value
will be very nearly the same as the UV hysteresis, since typically R1 >> R2.
If more independent control is needed for the OVLO hysteresis, there are several options. One option is to use
separate dividers for both the UVLO and OVLO pins, as shown in Figure 27b. In this case, once R1 and R7 have
been selected for the required hysteresis per equation (9), the bottom resistors in the dividers (R2 and R8 in
Figure 27b) can be found from equation (12).
R
XVLO
+
V
REF
ǒ
V
XV_L
* V
REF
Ǔ
R
TOP
where:
D R
XVLO
is R2 or R8
D R
TOP
is R1 or R7 as appropriate for the threshold being set
D V
XV_L
is the under (V
UV_L
) or overvoltage (V
OV_L
) threshold at the supply input
D V
REF
is either V
TH_UV
or V
TH_OV
from the specification table, as required for the resistor being calculated
Capacitor on UVLO Pin
As shown in the typical application diagram, a minimum 1500 pF capacitor is required on the UVLO pin of the
TPS2393A. For some systems, it may be desirable to slow down the response of the controller to undervoltage
conditions. For example, if frequent voltage dips are anticipated due to other power events in the system, it may
be beneficial to delay somewhat the response of the detection circuit. For these situations, the size of the
capacitor can be increased accordingly, over the value shown.
(10)
(11)
(12)