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SLUS471D − JUNE 2002 − REVISED JANUARY 2008

    

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FEATURES

Wide Input Supply Range: −36 V to −80 V

D Transient Rating to −100 V

D Programmable Current Limit

D Programmable Current Slew Rate

D Enable Input (EN)

D Fault Timer to Eliminate Nuisance Trips

D Open-Drain Fault Output (FAULT)

D Requires Few External Components

D 8-Pin MSOP Package

⋅

APPLICATIONS

−48-V Distributed Power Systems

D Central Office Switching

D Wireless Base Station

DESCRIPTION

The TPS2390 and TPS2391 integrated circuits

are hot swap power managers optimized for use

in nominal −48-V systems. They are designed for

supply voltage ranges up to −80 V, and are rated

to withstand spikes to −100 V. In conjunction with

an external N-channel FET and sense resistor,

they can be used to enable live insertion of plug-in

cards and modules in powered systems. Both

devices provide load current slew rate and peak

magnitude limiting, easily programmed by sense

resistor value and a single-external capacitor.

They also provide single-line fault reporting,

electrical isolation of faulty cards, and protection

against nuisance overcurrent trips. The TPS2390

latches off in response to current faults, while the

TPS2391 periodically retries the load in the event

of a fault.

APPLICATION DIAGRAM

UDG−02085

DGK PACKAGE

(TOP VIEW)

FAULT

FLTTIME

IRAMP

RTN

GATE

ISENS

−VIN

FAULT

FLTTIME

GATE

ISENSE

−VIN

IRAMP

RTN

TPS2390/1

3900 pF

−48V_IN

−48V_RTN

DC/DC

CONVERTER

MODULE

IRF530

100 µF

100 V

OUT

−

0.02 Ω

1/4 W 1%

0.1 µF

10 kΩ

1 W

100 kΩ

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

Summary of content (22 pages)

PAGE 1
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 FEATURES D Wide Input Supply Range: −36 V to −80 V D Transient Rating to −100 V D Programmable Current Limit D Programmable Current Slew Rate D Enable Input (EN) D Fault Timer to Eliminate Nuisance Trips D Open-Drain Fault Output (FAULT) D Requires Few External Components D 8-Pin MSOP Package DESCRIPTION The TPS2390 and TPS2391 integrated circuits are hot swap power managers optimized for use in nominal −48-V system
PAGE 2
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 ABSOLUTE MAXIMUM RATINGS (See Note 1) TPS2390/1 UNIT −0.3 V to 15 V −0.3 V to 100 V −0.3 V to 100 V −0.
PAGE 3
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 ELECTRICAL CHARACTERISTICS VI(−VIN) = −48 V with respect to RTN, VI(EN) = 2.
PAGE 4
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 ELECTRICAL CHARACTERISTICS (continued) VI(−VIN) = −48 V with respect to RTN, VI(EN) = 2.
PAGE 5
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 DETAILED PIN DESCRIPTIONS (continued) GATE: Gate drive for external N-channel FET. When enabled, and the input supply is above the UVLO threshold, the gate drive is enabled and the device begins charging an external capacitor connected to the IRAMP pin. This pin voltage is used to develop the reference voltage at the non-inverting input of the internal LCA. The inverting input is connected to the current sense node, ISENS.
PAGE 6
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 TYPICAL CHARACTERISTICS LIVE INSERTION EVENT VIN = −48 V LIVE INSERTION EVENT VIN = −80 V EN (20 V/div.) EN (20 V/div.) VDRAIN (50 V/div.) VDRAIN (20 V/div.) Power Applied Power Applied CLOAD = 100 µF CIRAMP = 3900 pF CFLT = 0.1 µF CLOAD = 50 µF ILOAD (500 mA/div.) ILOAD (500 mA/div.) t − TIme − 1 ms/div t − TIme − 1 ms/div Figure 1 Figure 2 LOAD CURRENT RAMP PROFILES START-UP FROM ENABLE ASSERTION IRAMP (2 V/div.) EN (5 V/div.
PAGE 7
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 TYPICAL CHARACTERISTICS TURN-ON INTO SHORTED LOAD (TPS2391) TURN-ON INTO SHORTED LOAD (TPS2390) VDRAIN (50 V/div.) VDRAIN (50 V/div.) FLTTIME (2 V/div.) FLTTIME (2 V/div.) ILOAD (1 A/div.) ILOAD (1 A/div.) FAULT (20 V/div.) CIRAMP = 3900 pF CFLT = 0.047 µF FAULT (20 V/div.) CIRAMP = 3900 pF CFLT = 0.
PAGE 8
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 TYPICAL CHARACTERISTICS SUPPLY CURRENT vs AMBIENT TEMPERATURE RECOVERY FROM A FAULT − EXPANDED VIEW (TPS2391) 1200 1000 ICC − Supply Current − µA FAULT (50 V/div) FLTTIME (2 V/div.) VDRAIN (20 V/div) CIRAMP = 3900 pF CFLT = 0.
PAGE 9
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 TYPICAL CHARACTERISTICS IRAMP OUTPUT CURRENT vs AMBIENT TEMPERATURE, NORMAL RATE TIMER CHARGING CURRENT vs AMBIENT TEMPERATURE −9.5 −45 VI(ISENS) = 80 mV VO(FLTTIME) =2V −9.7 −47 ICHG − Charging Current − µA ISRC2 − IRAMP Output Current − µA Average for VO(IRAMP) = 1 V, 3 V VRTN = 36 V to 80 V −9.9 −10.1 −10.3 −49 VRTN = 80 V −51 −53 VRTN = 36 V VRTN = 48 V −10.
PAGE 10
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION When a plug-in module or printed circuit card is inserted into a live chassis slot, discharged supply bulk capacitance on the board can draw huge transient currents from the system supplies. Without some form of inrush limiting, these currents can reach peak magnitudes ranging up to several hundred amps, particularly in high-voltage systems.
PAGE 11
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION 10 µ A 600 nA VDD SLOW + LCA IRAMP 7 GATE 6 ISENS 1 FAULT 4 99 R RAMP CONTROL R 40mV OC EN 2 + ON EN_A 1.4V + OL 50 µ A 100mV 4V FLTTIME 3 OVERLOAD COMP + ON 0.4 µ A RTN 8 0.5V + 30 V DCHG VDD 14V −VIN TIMER BLOCK + RETRY FAULT LOGIC S Q R Q ON ’91 ONLY 5 UDG−02091 Figure 17.
PAGE 12
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION In response to a latched fault condition, the TPS2391 enters a fault retry mode, wherein it periodically retries the load to test for continued existence of the fault. In this mode, the FLTTIME capacitor is discharged slowly by a about a 0.4-µA constant-current sink. When the voltage at the FLTTIME pin decays below 0.5 V, the LCA and RAMP CONTROL circuits are re-enabled, and a normal turn-on current ramp ensues.
PAGE 13
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION When setting the sense resistor value, it is important to consider two factors, the minimum current that may be imposed by the TPS2390 or TPS2391, and the maximum load under normal operation of the module. For the first factor, the specification minimum clamp value is used, as seen in equation (1). This method accounts for the tolerance in the sourced current limit below the typical level expected (40 mV/RSENSE).
PAGE 14
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION setting the fault timing capacitor The fault timeout period is established by the value of the capacitor connected to the FLTTIME pin, CFLT. The timeout period permits riding out spurious current glitches and surges that may occur during operation of the system, and prevents indefinite sourcing into faulted loads swapped into a live system.
PAGE 15
SLUS471D − JUNE 2002 − REVISED JANUARY 2008 APPLICATION INFORMATION If the result of equation (4) is larger than the maximum input supply value, then the load can be expected to charge completely during the inrush slewing portion of the insertion event. However, if this voltage is less than the maximum supply input, VIN(max), the HSPM transitions to the constant-current charging of the load. The remaining amount of time required at IMAX is determined from equation (5).
PAGE 16
PACKAGE OPTION ADDENDUM www.ti.
PAGE 17
PACKAGE OPTION ADDENDUM www.ti.com 10-Jun-2014 (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line.
PAGE 18
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TPS2390DGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 TPS2391DGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.
PAGE 19
PACKAGE MATERIALS INFORMATION www.ti.com 16-Aug-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS2390DGKR VSSOP DGK 8 2500 366.0 364.0 50.0 TPS2391DGKR VSSOP DGK 8 2500 366.0 364.0 50.
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