Datasheet
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DESCRIPTION (CONTINUED)
TPS2384
SLUS634D – NOVEMBER 2004 – REVISED MARCH 2007
The TPS2384 has three internal supply buses (10 V, 6.3 V and 3.3 V) generated from the 48-V input supply.
These supplies are used to bias all internal digital and analog circuitry. Each supply has been brought out
separately for proper bypassing to insure high performance. The digital supply (3.3 V) is available for powering
external loads up to 2 mA. For more demanding loads it is highly recommended to use external buffers to
prevent system degradation. When the TPS2384 is initially powered up an internal Power-on-Reset (POR)
circuit resets all registers and sets all ports to the off state to ensure that the device is powered up in a known
safe operating state.
The TPS2384 has three modes of operation; automode (AM), semi-automode (SAM) and power management
mode (PMM).
• In auto mode the TPS2384 performs discovery, classification and delivery of power autonomously to a
compliant PD without the need of a micro-controller.
• In semi-automode the TPS2384 operates in automode but users can access the contents of all read status
registers and A/D registers through the I
2
C serial interface. All write control registers are active except for D0
through D3 of Port Control register 1 (Address 0010) for limited port control. The semi-auto mode allows the
TPS2384 to detect valid PD's without micro-controller intervention but adds a flexibility to perform power
management activities.
• Power management mode (with a micro-controller) allows users additional capabilities of discovering
non-compliant (legacy) PDs, performing AC Disconnect and advanced power management system control
that are based on real time port voltages and currents. All functions in this mode are programmed and
controlled through read/write registers over the I
2
C interface. This allows users complete freedom in
detecting and powering devices. A comprehensive software package is available that mates the power of the
TPS2384 with the MSP430 micro-controller.
TPS2384 integrated output stage provides port power and low-side control. The internal low-side circuitry is
designed with internal current sensing so there are no external resistors required. The output design ensures the
power switches operate in the fully enhanced mode for low power dissipation.
The I
2
C interface allows easy application of opto-coupler circuitry to maintain Ethernet port isolation when a
ground based micro-controller is required. The TPS2384 five address pins (A1–A5) allow the device to be
addressed at one of 31 possible I
2
C addresses. Per-port write registers separately control each port state
(discovery, classification, legacy, power up, etc) while the read registers contain status information of the entire
process along with parametric values of discovery, classification, and real-time port operating current, voltage
and die temperature.
The proprietary 15-bit integrating A/D converter is designed to meet the harsh environment where the PSEPM
resides. The converter is set for maximum rejection of power line noise allowing it to make accurate
measurements of line currents during discovery, classification and power delivery for reliable power
management decisions.
TheTPS2384 is available in either 64-pin PowerPAD™ down (PAP) or 64-pin PowerPAD™ up (PJD) packages.
ORDERING INFORMATION
TEMPERATURE RANGE PACKAGED DEVICES
(1)
T
A
= T
J
TQFP – 64 (PAP)
(2)
TQFP – 64 (PJD)
(2)
–40 ° C to 125 ° C TPS2384PAP TPS2384PJD
(1) The PAP and PJD packages are available taped and reeled. Add R suffix to device type
(e.g.TPS2384PAPR) to order quantities of 1000 devices per reel.
(2) PAP = PowerPad™ down, PJD = PowerPad™ up.
2
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