Datasheet
Table Of Contents
0
1
2
3
4
5
6
7
0 1 2 3 4 5 6 7 8 9 10
T
A
= −40°C
T
A
= 125°C
T
A
= 25°C
V
(VDD−VSS)
(V)
I
VDD
(µA)
G001
0
10
20
30
40
50
0 1 2 3 4 5 6 7 8 9 10
Detection Resistance
V
(VDD−VSS)
(V)
Resistance (kΩ)
G002
21
21.5
22
22.5
−50 −25 0 25 50 75 100 125
Class Upper Threshold, On
Class Upper Threshold, Off
Junction Temperature (°C)
V
(VDD−VSS)
(V)
G003
10.5
11
11.5
12
12.5
13
−50 −25 0 25 50 75 100 125
Class Lower Threshold, On
Class Lower Threshold, Off
Junction Temperature (°C)
V
(VDD−VSS)
(V)
G004
120
160
200
240
280
320
360
400
20 25 30 35 40 45 50 55 60
T
A
= −40°C
T
A
= 125°C
T
A
= 25°C
V
(VDD−VSS)
(V)
I
VDD
(µA)
G009
3
3.5
4
4.5
−50 −25 0 25 50 75 100 125
Mark Reset Threshold
Junction Temperature (°C)
V
(VDD−VSS)
(V)
G006
TPS2379
www.ti.com
SLVSB98 –MARCH 2012
V
DD
: This pin connects to the positive side of the input supply. It provides operating power to the PD controller
and allows monitoring of the input line voltage.
V
SS
: This is the input supply negative rail that serves as a local ground. The PowerPad™ must be connected to
this pin to ensure proper operation.
PowerPAD
The PowerPad is internally connected to V
SS
. It should be tied to a large V
SS
copper area on the PCB to provide
a low resistance thermal path to the circuit board. It is recommended that a clearance of 0.025” be maintained
between V
SS
and high-voltage signals such as V
DD
.
TYPICAL CHARACTERISTICS
Figure 4. Detection Bias Current vs PoE Voltage Figure 5. Detection Resistance vs PoE Voltage
Figure 6. Classification Upper Threshold vs Temperature Figure 7. Classification Lower Threshold vs Temperature
Figure 8. IVDD Bias Current vs Voltage Figure 9. Mark Reset Threshold vs Temperature
Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s) :TPS2379