Datasheet
Table Of Contents
V
UVLO_R
Detection
Classification
PD Powered
Idle
V
CL_ON
V
CL_H
V
CU_OFF
V
CU_H
Note: Variable names refer to Electrical Characteristic Table parameters
V
DD
-V
SS
V
UVLO_H
Mark
V
MSR
Functional
State
Type 2
Type 1
Time: 50ms/div
I
PI
Inrush
Load enabled using
CDB plus delay
Detect
Class Mark
V
VDD-VSS
V
RTN-VSS
Voltage: 10 V/div
Current: 100 mA/div
TPS2379
SLVSB98 –MARCH 2012
www.ti.com
Figure 19. Threshold Voltages
PoE Startup Sequence
The waveforms of Figure 20 demonstrate detection, classification, and startup from a PSE with type 2 hardware
classification. The key waveforms shown are V(VDD-VSS), V(RTN-VSS), and IPI. IEEE 802.3at requires a
minimum of two detection levels, two class and mark cycles, and startup from the second mark event. V
RTN
to
V
SS
falls as the TPS2379 charges C
BULK
following application of full voltage. In Figure 20, deassertion of the CDB
signal is delayed and used to enable load current as seen in the I
PI
waveform.
Figure 20. Startup
Detection
The TPS2379 pulls DEN to V
SS
whenever V
(VDD-VSS)
is below the lower classification threshold. When the input
voltage rises above V
CL-ON
, the DEN pin goes to an open-drain condition to conserve power. While in detection,
RTN is high impedance, and almost all the internal circuits are disabled. An R
DEN
of 24.9 kΩ (±1%), presents the
correct signature. It may be a small, low-power resistor since it only sees a stress of about 5 mW. A valid PD
detection signature is an incremental resistance ( ΔV/ΔI ) between 23.75 kΩ and 26.25 kΩ at the PI.
The detection resistance seen by the PSE at the PI is the result of the input bridge resistance in series with the
parallel combination of RDEN and internal VDD loading. The input diode bridge’s incremental resistance may be
hundreds of ohms at the very low currents drawn when 2.7 V is applied to the PI. The input bridge resistance is
partially compensated by the TPS2379's effective resistance during detection.
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