Datasheet
t
DT1
GATEGAT2
50%
50%
t
DT2
time
lo
lo
hi
hi
TPS23757
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SLVS948D –JULY 2009–REVISED NOVEMBER 2013
ELECTRICAL CHARACTERISTICS – PoE AND CONTROL
[V
DD
= V
DD1
] or [V
DD1
= RTN], V
C
= RTN, COM = RTN = ARTN, all voltages referred to V
SS
unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DETECTION (DEN) (V
DD
= V
DD1
= RTN = V
SUPPLY
positive)
Measure I
SUPPLY
Detection current V
DD
= 1.6 V 62 64.3 66.5
μA
V
DD
= 10 V 399 406 414
Detection bias current V
DD
= 10 V, float DEN, measure I
SUPPLY
5.6 10 μA
V
PD_DIS
Hotswap disable threshold 3 4 5 V
DEN leakage current V
DEN
= V
DD
= 57 V, float V
DD1
and RTN, measure I
DEN
0.1 5 μA
CLASSIFICATION (CLS) (V
DD
= V
DD1
= RTN = V
SUPPLY
positive)
13 V ≤ V
DD
≤ 21 V, Measure I
SUPPLY
R
CLS
= 1270 Ω 1.8 2.1 2.4
R
CLS
= 243 Ω 9.9 10.4 10.9
Classification current,
I
CLS
mA
applies to both cycles
R
CLS
= 137 Ω 17.6 18.5 19.4
R
CLS
= 90.9 Ω 26.5 27.7 29.3
R
CLS
= 63.4 Ω 38.0 39.7 42
V
CL_ON
Regulator turns on, V
DD
rising 11.2 11.9 12.6
Classification regulator lower
V
threshold
V
CL_H
Hysteresis
(1)
1.55 1.65 1.75
V
CU_OFF
Regulator turns off, V
DD
rising 21 22 23
Classification regulator upper
V
threshold
V
CU_H
Hysteresis
(1)
0.5 0.75 1.0
Leakage current V
DD
= 57 V, V
CLS
= 0 V, DEN = V
SS
, measure I
CLS
1 μA
PASS DEVICE (RTN) (V
DD1
= RTN)
On resistance 0.25 0.43 0.8 Ω
Current limit V
RTN
= 1.5 V, V
DD
= 48 V, pulsed measurement 400 465 535 mA
Inrush limit V
RTN
= 2 V, V
DD
: 0 V → 48 V, pulsed measurement 100 140 180 mA
Foldback voltage threshold V
DD
rising 11 12.3 13.6 V
UVLO
UVLO_R V
DD
rising 33.9 35 36.1
UVLO threshold V
UVLO_H Hysteresis
(1)
4.4 4.55 4.76
APb V
C
= 12 V, float V
DD1
, V
DD
= 48 V, ARTN = V
SS
ON characteristic V
APD
= 2 V, CTL = ARTN, (V
APb
- V
ARTN
) = 0.6 V 2 mA
Leakage current V
APb
= 18 V, (V
APD
-V
ARTN
) = 0 V, (V
PPD
- V
VSS
) = 0 V 10 μA
t
APb
Delay From start of switching to APb active 5 9 15 ms
THERMAL SHUTDOWN
Turnoff temperature T
J
rising 135 145 155 °C
Hysteresis
(2)
20 °C
(1) The hysteresis tolerance tracks the rising threshold for a given device.
(2) These parameters are provided for reference only, and do not constitute part of TI's published specifications for purposes of TI's product
warranty.
Figure 2. GATE and GAT2 Timing and Phasing
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