Datasheet

C
1
0.1mF
R
DEN
R
CLS
From Ethernet
Transformers
V
DD
V
SS
CLS
From Spare
Pairs or
Transformers
DEN
PPD
D
VDD
V
DD1
RTN
COM
ARTN
C
IN
D
1
58V
D
RTN
58V
C
VDD
0.01mF
TPS23757
SLVS948D –JULY 2009–REVISED NOVEMBER 2013 www.ti.com
Use of diode D
VDD
for PoE priority may dictate the use of additional protection around the TPS23757. ESD
events between the PD power inputs (PoE and adapter), or the inputs and converter output, cause large stresses
in the hotswap MOSFET if D
VDD
becomes reverse biased and transient current around the TPS23757 is blocked.
The use of C
VDD
and D
RTN
in Figure 24 provides additional protection should over-stress of the TPS23757 be an
issue. An SMAJ58A would be a good initial selection for D
RTN
. Individual designs may have to tune the value of
C
VDD
.
Figure 24. Example of Added ESD Protection for PoE Priority
Capacitor, C
1
The standard specifies an input bypass capacitor (from V
DD
to V
SS
) of 0.05 μF to 0.12 μF. Typically a 0.1 μF, 100
V, 10% ceramic capacitor is used.
Detection Resistor, R
DEN
The standard specifies a detection signature resistance, R
DEN
between 23.7 kΩ and 26.3 kΩ, or 25 kΩ ± 5%.
Choose an R
DEN
of 24.9 kΩ.
Classification Resistor, R
CLS
Connect a resistor from CLS to V
SS
to program the classification current according to the IEEE 802.3at standard.
The class power assigned should correspond to the maximum average power drawn by the PD during operation.
Select R
CLS
according to Table 1. The TPS23757 should not use class 4 as its input current is limited to class 3
(and lower) levels. Apart from power above 13W, there is no advantage to type 2 operation.
APD Pin Divider Network, R
APD1
, R
APD2
The APD pin can be used to disable the TPS23757 internal hotswap MOSFET giving the adapter source priority
over the PoE source. An example calculation is provided in (TI literature number) SLVA306A.
PPD Pin Divider Network, R
PPD1
, R
PPD2
The PPD pin can be used to override the internal hotswap MOSFET UVLO (UVLO_R and UVLO_H) when using
low voltage adapters connected between V
DD
and V
SS
. The PPD pin has an internal 5 μA pulldown current
source. As an example, consider the choice of R
PPD1
and R
PPD2
, for a 24 V adapter.
1. Select the startup voltage, V
ADPTR-ON
approximately 75% of nominal for a 24 V adapter. Assuming that the
adapter output is 24 V ± 10%, this provides 15% margin below the minimum adapter operating voltage.
2. Choose V
ADPTR-ON
= 24 V × 0.75 = 18 V
3. Choose R
PPD2
= 3.01 kΩ
4. Calculate R
PPD1
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