Datasheet

TPS23757
SLVS948D –JULY 2009–REVISED NOVEMBER 2013 www.ti.com
The PPD pin has a 5 μA internal pull-down current.
Locate the PPD pull-down resistor adjacent to the pin when used.
PPD may be tied to V
SS
or left open when not used.
RTN, ARTN, COM
RTN is internally connected to the drain of the PoE hotswap MOSFET, while ARTN is the quiet analog return for
the dc/dc controller. COM serves as the return path for the gate drivers and should be tied to ARTN on the circuit
board. The ARTN / COM / RTN net should be treated as a local reference plane (ground plane) for the dc/dc
control and converter primary. RTN and (ARTN/COM) may be separated by several volts for special applications.
APb
APb is an active low output that indicates [ (V
APD
> 1.5 V) OR (1.55 V ≤ V
PPD
≤ 8.3 V) ]. APb is valid after both a
delay of t
APb
from the start of converter switching, and [V
CTL
≤ (V
B
– 1 V)]. Once APb is valid, V
CTL
will not effect
it. APb will become invalid if the converter goes back into softstart, overtemperature, or is held off by the PD
during C
IN
recharge (inrush). APb is referenced to ARTN and is intended to drive the diode side of an
optocoupler. APb should be left open or tied to ARTN if not used.
V
B
V
B
is an internal 5.1 V regulated dc/dc controller supply rail that is typically bypassed by a 0.1 μF capacitor to
ARTN. V
B
should be used to bias the feedback optocoupler.
V
C
V
C
is the bias supply for the dc/dc controller. The MOSFET gate drivers run directly from V
C
. V
B
is regulated
down from V
C
, and is the bias voltage for the rest of the converter control. A startup current source from V
DD1
to
V
C
is controlled by a comparator with hysteresis to implement the converter bootstrap startup. V
C
must be
connected to a bias source, such as a converter auxiliary output, during normal operation.
A minimum 0.47 μF capacitor, located adjacent to the V
C
pin, should be connected from V
C
to COM to bypass
the gate driver. A larger total capacitance is required for startup to provide control power between the time the
converter starts switching and the availability of the converter auxiliary output voltage.
V
DD
V
DD
is the positive input power rail that is derived from the PoE source (PSE). V
DD
should be bypassed to V
SS
with a 0.1 μF capacitor as required by the IEEE standard. A transient suppressor diode (TVS), such as SMAJ58A
should be connected from V
DD
to V
SS
to protect against overvoltage transients.
V
DD1
V
DD1
is the dc/dc converter startup supply. Connect to V
DD
for many applications. V
DD1
may be isolated by a
diode from V
DD
to support PoE priority operation.
V
SS
V
SS
is the PoE input-power return side. It is the reference for the PoE interface circuits, and has a current-limited
hotswap switch that connects it to RTN. V
SS
is clamped to a diode drop above RTN by the hotswap switch.
A local V
SS
reference plane should be used to connect the input bypass capacitor, TVS, and R
CLS
.
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