Datasheet

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( ) ( )

BLNK BLNK

R k = t nsW

( )

APD1 APD2 ADPTR_ON APDEN APDEN

APD1 APD2

ADPTR_OFF APDEN APDH

APD2

R = R V V V

R + R

V = V V

´ -

TPS23754

TPS23754-1

TPS23756

SLVS885G –OCTOBER 2008–REVISED OCTOBER 2013

www.ti.com

PIN FUNCTIONS (continued)

NO.

TPS23754 TPS2375

NAME TYPE DESCRIPTION

and 4-1

TPS23756

DD1

11 11 I Source of DC/DC converter startup current. Connect to V

for many applications.

10 10 Connect to the negative power rail derived from the PoE source.

PIN DESCRIPTION

Refer to Figure 1 for component reference designators (R

for example), and the ELECTRICAL

CHARACTERISTICS for values denoted by reference (V

CSMAX

for example). Electrical characteristic values take

precedence over any numerical values used in the following sections.

APD

APD forces power to come from an external adapter connected from V

DD1

to RTN by opening the hotswap

switch, disabling the CLS output (see PPD pin description), and enabling the T2P output. TI recommends a

resistor divider on APD when it is connected to an external adapter. The divider provides ESD protection,

leakage discharge for the adapter ORing diode, and input voltage qualification. Voltage qualification assures the

adapter output voltage is high enough that it can support the PD before the PoE current is cut off.

Select the APD divider resistors per Equation 1 where V

ADPTR-ON

is the desired adapter voltage that enables the

APD function as adapter voltage rises.

(1)

Place the APD pull-down resistor adjacent to the APD pin.

APD should be tied to ARTN when not used.

BLNK

Blanking provides an interval between GATE going high and the current-control comparators on CS actively

monitoring the input. This delay allows the normal turn-on current transient (spike) to subside before the

comparators are active, preventing undesired short duty cycles and premature current limiting.

Connect BLNK to ARTN to obtain the internally set blanking period. Connect a resistor from BLNK to ARTN for a

more accurate, programmable blanking period. The relationship between the desired blanking period and the

programming resistor is defined by Equation 2.

(2)

Place the resistor adjacent to the BLNK pin when it is used.

CLS

A resistor from CLS to V

programs the classification current per the IEEE standard. The PD power ranges and

corresponding resistor values are listed in Table 1. The power assigned should correspond to the maximum

average power drawn by the PD during operation.

High-power PSEs may perform two classification cycles if Class 4 is presented on the first cycle. The TPS23754

device presents the same (resistor programmed) class each cycle per the standard.