Datasheet
R
CS
GATE
CS
RTN
R
S
C
S
ARTN
COM
SLOPE
SLOPE_D
MAX
S
SL_EX
V (mV)
V (mV)
D
R ( ) = 1000
I ( A)
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W ´
m
FRS
R
FRS
47pF
Synchronization
Pulse
V
SYNC
T
SYNC
1:1
1000pF
R
T
RTN
FRS
R
FRS
47pF
Synchronization
Pulse
V
SYNC
T
SYNC
ARTN
COM
RTN
ARTN
COM
FRS
SW
17250 17250
R (k ) = = = 69
f (kHz) 250
W
TPS23754
TPS23754-1
TPS23756
www.ti.com
SLVS885G –OCTOBER 2008–REVISED OCTOBER 2013
2. Compute R
FRS
:
(a)
(b) Select 69.8 kΩ.
The TPS23754 device may be synchronized to an external clock to eliminate beat frequencies from a sampled
system, or to place emission spectrum away from an RF input frequency. Synchronization may be accomplished
by applying a short pulse (T
SYNC
) of magnitude V
SYNC
to FRS as shown in Figure 30. R
FRS
should be chosen so
that the maximum free-running frequency is just below the desired synchronization frequency. The
synchronization pulse terminates the potential on-time period, and the off-time period does not begin until the
pulse terminates. The pulse at the FRS pin should reach between 2.5 V and V
B
, with a minimum width of 22 ns
(above 2.5 V) and rise and fall times less than 10 ns. The FRS node should be protected from noise because it is
high-impedance. An R
T
on the order of 100 Ω in the isolated example reduces noise sensitivity and jitter.
Figure 30. Synchronization
Current Slope Compensation
The TPS23754 device provides a fixed internal compensation ramp that suffices for most applications. R
S
(see
Figure 31) may be used if the internally provided slope compensation is not enough.
Most current-mode control papers and application notes define the slope values in terms of V
PP
/ T
S
(peak ramp
voltage / switching period). However, the electrical characteristics table specifies the slope peak (V
SLOPE
) based
on the maximum (78%) duty cycle. Assuming that the desired slope, V
SLOPE-D
(in mV/period), is based on the full
period, compute R
S
per the following equation where V
SLOPE
, D
MAX
, and I
SL-EX
are from the electrical
characteristics table with voltages in mV, current in μA, and the duty cycle is unitless (for example, D
MAX
= 0.78).
(6)
Figure 31. Additional Slope Compensation
C
S
may be required if the presence of R
S
causes increased noise, due to adjacent signals like the gate drive, to
appear at the C
S
pin.
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