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TPS23754
TPS23754-1
TPS23756
SLVS885G –OCTOBER 2008–REVISED OCTOBER 2013
www.ti.com
The converter may be synchronized to a frequency above its maximum free-running frequency by applying short
AC-coupled pulses into the FRS pin per Figure 30.
The FRS pin is high impedance. Keep the connections short and apart from potential noise sources. Special care
should be taken to avoid crosstalk when synchronizing circuits are used.
GATE
Gate drive output for the DC/DC converter’s main switching MOSFET. GATE’s phase turns the main switch on
when it transitions high, and off when it transitions low. GATE is held low when the converter is disabled.
GAT2
GAT2 is the second gate drive output for the DC/DC converter. GAT2’s phase turns the second switch off when it
transitions high, and on when it transitions low. This drives active-clamp PMOS devices per Figure 1, and driven
flyback synchronous rectifiers per Figure 28. See the DT pin description for GATE to GAT2 timing. Connecting
DT to V
B
disables GAT2 in a high-impedance condition. GAT2 is low when the converter is disabled.
PPD
PPD is a multifunction pin that has two voltage thresholds, PPD1 and PPD2.
PPD1 permits power to come from an external low voltage adapter, that is, 24 V, connected from V
DD
to V
SS
by
overriding the normal hotswap UVLO. Voltage on PPD above 1.55 V (V
PPDEN
) enables the hotswap MOSFET,
inhibits class current, and enables T2P. A resistor divider per Figure 35 provides ESD protection, leakage
discharge for the adapter ORing diode, reverse adapter protection, and input voltage qualification. Voltage
qualification assures the adapter output voltage is high enough that it can support the PD before it begins to draw
current.
(5)
PPD2 enables normal class regulator operation when V
PPD
is above 8.3 V to permit type 2 classification when
APD is used in conjunction with diode D
VDD
(see Figure 34). Tie PPD to V
DD
when PPD2 operation is desired.
The PPD pin has a 5-μA internal pull-down current.
Locate the PPD pull-down resistor adjacent to the pin when used.
PPD may be tied to V
SS
or left open when not used.
RTN, ARTN, COM
RTN is internally connected to the drain of the PoE hotswap MOSFET, while ARTN is the quiet analog reference
for the DC/DC controller return. COM serves as the return path for the gate drivers and should be tied to ARTN
on the circuit board. The ARTN / COM / RTN net should be treated as a local reference plane (ground plane) for
the DC/DC control and converter primary. RTN and (ARTN/COM) may be separated by several volts for special
applications.
T2P
T2P is an active low output that indicates [ (V
APD
> 1.5 V) OR (1.55 V ≤ V
PPD
≤ 8.3 V) OR (type 2 hardware
classification observed) ]. T2P is valid after both a delay of t
T2P
from the start of converter switching, and [V
CTL
≤
(V
B
– 1 V)]. Once T2P is valid, V
CTL
does not affect it. T2P becomes invalid if the converter goes back into
softstart, overtemperature, or is held off by the PD during C
IN
recharge (inrush). T2P is referenced to ARTN and
is intended to drive the diode side of an optocoupler. T2P should be left open or tied to ARTN if not used.
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