Datasheet

GATE
RTN
V
C
CS
V
DD
V
SS
DEN
BLNK
FRS
V
B
CTL
CLS
1
2
3
4
5
6
7
8
14
13
11
10
9
12
APD
V
DD1
TPS23753
www.ti.com
SLVS853C JUNE 2008REVISED JANUARY 2010
ELECTRICAL CHARACTERISTICS (continued)
PoE and Control
[V
DD
= V
DD1
] or [V
DD1
] = RTN, V
VC-RTN
= 0 V, all voltages referred to V
SS
. Typical specifications are at 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RTN (PASS DEVICE) (V
DD1
= RTN)
On resistance 0.7 1.2
Current limit V
RTN
= 1.5 V, V
DD
= 48 V, Pulsed Measurement 405 450 505 mA
Inrush limit V
RTN
= 2 V, V
DD
: 0 V 48 V, Pulsed Measurement 100 140 180 mA
Foldback voltage threshold V
DD
rising 11 12.3 13.6 V
I
lkg
Leakage current V
DD
= V
RTN
= 100 V, DEN = V
SS
40 μA
UVLO
UVLO_R V
DD
rising 33.9 35 36.1
Undervoltage lockout threshold V
UVLO_H Hysteresis
(2)
4.40 4.55 4.70
THERMAL SHUTDOWN
Turn off temperature 135 145 155 °C
Hysteresis
(3)
20 °C
(2) The hysteresis tolerance tracks the rising threshold for a given device.
(3) These parameters are provided for reference only, and do not constitute part of TI's published device specifications for purposes of TI's
product warranty.
DEVICE INFORMATION
TOP VIEW
Table 1. Terminal Functions
TERMINAL
I/O DESCRIPTION
NO. NAME
1 CTL I The control loop input to the PWM (pulse width modulator). Use V
B
as a pull up for CTL.
5 V bias rail for dc/dc control circuits. Apply a 0.1 μF to RTN. V
B
may be used to bias an external optocoupler for
2 V
B
O
feedback.
Dc/dc converter switching MOSFET current sense input. Connect CS to the high side of the RTN-referenced
3 CS I
current sense resistor.
Dc/dc converter bias voltage. The internal startup current source and converter bias winding output power this pin.
4 V
C
I/O
Connect a 0.22 μF minimum ceramic capacitor to RTN, and a larger capacitor to facilitate startup.
5 GATE O Gate drive output for the dc/dc converter switching MOSFET.
6 RTN RTN is the negative rail input to the dc/dc converter and output of the PoE hotswap.
7 V
SS
Negative power rail derived from the PoE source.
8 V
DD1
Source of dc/dc converter startup current. Connect to V
DD
for most applications.
9 V
DD
Positive input power rail for PoE interface circuit. Derived from the PoE source.
Connect a 24.9 k resistor from DEN to V
DD
to provide the PoE detection signature. Pulling this pin to V
SS
during
10 DEN I/O
powered operation causes the internal hotswap MOSFET to turn off.
11 CLS O Connect a resistor from CLS to V
SS
to program the classification current per Table 2.
Pull APD above 1.5 V to disable the internal PD hotswap switch, forcing power to come from an external adapter.
12 APD I
Connect to the adapter through a resistor divider.
Connect to RTN to utilize the internally set blanking period or connect through a resistor to RTN to program the
13 BLNK I/O
blanking period.
14 FRS I/O Connect a resistor from FRS to RTN to program the converter switching frequency.
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