Datasheet

0
1
2
3
4
5
6
7
8
10
000.0E
+0
10.0E-3 20.0E-3 30.0E-3 40.0E-3 50.0E-3 60.0E-3 70.0E-3 80.0E-3 90.0E-3 100.0E-
3
t-Time10-ms/DIV
-0.7
-0.6
-0.5
I
PI
V
DD
-RTN
V
C
-RTN
INRUSH
TurnON
V
OUT
50V/DIV
2V/DIV
10V/DIV
100mA/Div
Exaggeratedprimary-
secondarysoftstarthandoff
TPS23753
SLVS853C –JUNE 2008–REVISED JANUARY 2010 www.ti.com
Converter switching is allowed if the PD is not in inrush and the V
C
under-voltage lock out (UVLO) permits it.
Continuing the startup sequence shown in Figure 19, V
VC
rises as the startup current source charges C
VC
and
M1 switching is inhibited by the status of the V
C
UVLO. The V
B
regulator powers the internal converter circuits as
V
VC
rises. Startup current is turned off, converter switching is enabled, and a softstart cycle starts when V
VC
exceeds UVLO
1
(~9 V). V
VC
falls as it powers both the internal circuits and the switching MOSFET gate. If the
converter control-bias output rises to support V
VC
before it falls to UVLO
1
– UVLO
1H
(~5.5 V), a successful
startup occurs. Figure 19 shows a small droop in V
VC
while the output voltage rises smoothly and a successful
startup occurs.
Figure 19. Power Up and Start
If V
VDD-VSS
drops below the lower PoE UVLO (UVLO
R
– UVLO
H
, ~30.5 V), the hotswap MOSFET is turned off,
but the converter will still run. The converter will stop if V
VC
falls below the converter UVLO (UVLO
1
– UVLO
H
,
~5.5 V), the hotswap is in inrush current limit, or 0% duty cycle is demanded by V
CTL
(V
CTL
< V
ZDC
, ~1.5 V), or
the converter is in thermal shutdown.
PD Interface Features
The PD section has the following functions, with the first four covered above.
• Detection
• Classification
• V
DD
to V
SS
UVLO
• Orderly sequencing of C
IN
charge and converter operation
• Hotswap switch current limit
• Hotswap switch foldback
• Hotswap thermal protection
The internal hotswap MOSFET is protected against output faults with a current limit and deglitched foldback. The
PSE output cannot be relied on to protect the PD MOSFET against transient conditions, so the PD implements
its own protection. High stress conditions include converter output shorts, shorts from V
DD
to RTN, or transients
on the input line. An overload on the pass MOSFET engages the current limit, with V
RTN-VSS
rising as a result. If
V
RTN
rises above ~12 V for longer than ~400 μs, the current limit reverts to the inrush limit, and turns the
converter off. The 400 μs deglitch feature prevents momentary transients from causing a PD reset, provided that
recovery lies within the bounds of the hotswap and PSE protection. Figure 20 shows an example of recovery
from a 15 V PSE rising voltage step. The hotswap MOSFET goes into current limit, overshooting to a relatively
low current, recovers to 420 mA full current limit, and charges the input capacitor while the converter continues to
run. The MOSFET did not go into foldback because V
RTN-VSS
was below 12 V after the 400 μs deglitch.
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