Datasheet

V
UVLO_R
Detection
Classification
PD Powered
Idle
V
CL_ON
V
CL_HYS
1.4V
V
CU_OFF
V
CU_HYS
Note: Variable names refer to Electrical Characteristic
Table parameters
V
VDD-VSS
V
UVLO_H
Operational State
TPS23753
SLVS853C –JUNE 2008–REVISED JANUARY 2010 www.ti.com
Figure 17. Threshold Voltages
PoE Startup Sequence
The waveforms of Figure 18 demonstrate detection, classification, and startup from a type 1 PSE. The key
waveforms shown are V
VDD-VSS
, V
RTN-VSS
, and I
PI
. IEEE 802.3at requires a minimum of two detection levels;
however; four levels are shown in this example. Four levels guard against misdetection of a device when plugged
in during the detection sequence.
Figure 18. PoE Startup Sequence
Detection
The TPS23753 is in detection mode whenever V
VDD-V SS
is below the lower classification threshold. When the
input voltage rises above V
CL_ON
, the DEN pin goes to an open-drain condition to conserve power. While in
detection, RTN is high impedance, almost all the internal circuits are disabled, and the DEN pin is pulled to V
SS
.
An R
DEN
of 24.9 kΩ (1%), presents the correct signature. It may be a small, low-power resistor since it only sees
a stress of about 5 mW. A valid PD detection signature is an incremental resistance between 23.75 kΩ and
26.25 kΩ at the PI.
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