Datasheet

R
CS
GATE
CS
RTN
R
S
C
S
5/09/08
15000
( )
( )
FRS
SW
R k
f kHz
Ω =
FRS
R
FRS
47pF
Synchronization
Pulse
V
SYNC
T
SYNC
1:1
1000pF
R
T
RTN
FRS
R
FRS
47pF
Synchronization
Pulse
V
SYNC
T
SYNC
RTN
TPS23753A
SLVS933B –JULY 2009–REVISED JANUARY 2010 www.ti.com
Figure 22. Additional Slope Compensation
C
S
may be required if the presence of R
S
causes increased noise, due to adjacent signals like the gate drive, to
appear at the C
S
pin. The TPS23753A has an internal pull-down on C
S
( ~400 Ω max ) while the MOSFET is
OFF to reduce cycle-to-cycle carry-over voltage on C
S
.
FRS and Synchronization
The FRS pin programs the (free-running) oscillator frequency, and may also be used to synchronize the
TPS23753A converter to a higher frequency. The internal oscillator sets the maximum duty cycle and controls
the current-compensation ramp circuit, making the ramp height independent of frequency. R
FRS
should be
selected per the following equation.
(7)
The TPS23753A may be synchronized to an external clock to eliminate beat frequencies from a sampled system,
or to place emission spectrum away from an RF input frequency. Synchronization may be accomplished by
applying a short pulse ( > 25 ns) of magnitude V
SYNC
to FRS as shown in Figure 23. R
FRS
should be chosen so
that the maximum free-running frequency is just below the desired synchronization frequency. The
synchronization pulse terminates the potential on-time period, and the off-time period doesn’t begin until the
pulse terminates. A short pulse is preferred to avoid reducing the potential on-time.
Figure 23 shows examples of non-isolated and transformer-coupled synchronization circuits RT will reduce noise
susceptibility for the isolation transformer implementation. The FRS node should be protected from noise
because it is high impedance.
Figure 23. Synchronization
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