Datasheet

Time: 5ms/div
10V/div
500mV/div
1A/div
I
LOAD
V
SRD
V
CTL
VFO
Mode
VFO
Mode
PWM Mode
Natural Hysteresis
TPS23751
TPS23752
www.ti.com SLVSB97C –JULY 2012–REVISED JANUARY 2014
Figure 27. Converter Mode Transition
There is a natural load current hysteresis for I
LOAD
which can be seen in Figure 27 between the transition points.
For increasing I
LOAD
, the transition current is slightly higher than for decreasing I
LOAD
. This condition is due
partially to CTL pin hysteresis (approximately 35mV) and partially due to CTL pin operating point versus mode.
V
CTL
is slightly higher in PWM mode than in VFO mode for given output load at or near the transition point.
Bootstrap Topology
The internal startup current source (I
VC_ST
) and control logic implement a bootstrap-type startup as discussed in
the Startup and Converter Operation section. The startup current source charges C
VC
from V
DD
when the
converter is disabled (either by the PD control or the V
C
control) to store enough energy to start the converter.
Steady-state operating power must come from a converter (bias winding) output or other source. Loading on V
C
and V
B
must be minimal while C
VC
charges, otherwise the converter may never start. The optocoupler does not
load V
B
when the converter is off for most situations, however care should be taken in ORing topologies where
the output is powered when PoE is off.
The converter shuts off when V
C
falls below its lower UVLO. This can happen when power is removed from the
PD, or during a fault on a converter output rail. When one output is shorted, all the output voltages fall including
the one that powers V
C
. The control circuit discharges V
C
until it hits the lower UVLO and turns off. A restart is
initiated as described in the Startup and Converter Operation section if the converter turns off and there is
sufficient V
DD
voltage. This type of operation is sometimes referred to as hiccup mode which provides robust
output short protection by providing time-average heating reduction of the output rectifier.
Below V
CUV
, the bootstrap control logic disables most of the converter controller circuits except the V
B
regulator
and internal reference. GATE is low when the converter is disabled.
The bootstrap source provides reliable startup from widely varying input voltages, and eliminates the continual
power loss of external resistors. The startup current source does not charge above the maximum recommended
V
VC
if the converter is disabled and there is sufficient V
DD
to charge higher.
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