Datasheet

Mark Class
Between
Ranges
Operating
T2P
Open-Drain
Operating
T2P Low
Between
Ranges
UVLO
Rising
UVLO
Falling
UVLO
Falling
TYPE 2 PSE
Hardware Class
Class
TYPE 1 PSE
Hardware Class
Between
Ranges
PoE Startup Sequence
Mark
Reset
Idle Class
Mark Class
Between
Ranges
UVLO
Rising
Detect
TPS23751
TPS23752
www.ti.com SLVSB97C –JULY 2012–REVISED JANUARY 2014
Hardware Classification
Hardware classification allows a PSE to determine the power requirements of a PD before powering, and helps
with power management once power is applied. Type 2 hardware classification permits high power PSEs and
PDs to determine whether the connected device can support high-power operation. A type 2 PD presents class 4
in hardware to indicate that it is a high-power device. A type 1 PSE treats a class 4 device like a class 0 device,
allotting 13 W if it chooses to power the PD. A PD that receives a 2-event class understands that it is powered
from a high-power PSE and it may draw up to 25.5 W immediately after the 80 ms startup period completes. A
type 2 PD that does not receive a 2-event hardware classification may choose to not start, or must start in a 13
W condition and request more power through the DLL after startup. The standard requires a type 2 PD to
indicate that it is underpowered if this occurs. Startup of a high-power PD under 13 W implicitly requires some
form of powering down sections of the application circuits.
The maximum power entries in Table 1 determine the class the PD must advertise. The PSE may disconnect a
PD if it draws more than its stated Class power, which may be the hardware class or a lower DLL-derived power
level. The standard permits the PD to draw limited current peaks that increase the instantaneous power above
the Table 1 limit, however the average power requirement always applies.
The TPS23751 and TPS23752 implement two-event classification. Selecting an R
CLS
of 63.4 Ω provides a valid
type 2 signature. A TPS23751 or TPS23752 may be used as a compatible type 1 device simply by programming
class 0–3 per Table 1. DLL communication is implemented by the Ethernet communication system in the PD and
is not implemented by the TPS23751 or TPS23752.
The TPS23751 and TPS23752 disable classification above V
CU_OFF
to avoid excessive power dissipation. CLS
voltage is turned off during PD thermal limiting or when DEN is active. The CLS output is inherently current
limited, but should not be shorted to V
SS
for long periods of time.
Figure 23 shows how classification works for the TPS23751 and TPS23752. Transition from state-to-state occurs
when comparator thresholds are crossed (see Figure 20 and Figure 21). These comparators have hysteresis,
which adds inherent memory to the machine. Operation begins at idle (unpowered by PSE) and proceeds with
increasing voltage from left to right. A 2-event classification follows the (heavy lined) path towards the bottom,
ending up with a latched type 2 decode along the lower branch that is highlighted. This state results in a low T2P
during normal operation. Once the valid path to type 2 PSE detection is broken, the input voltage must transition
below the mark reset threshold to start anew.
Figure 23. Two-Event Class Internal States
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