Datasheet

TPS2363
SLUS680B –JANUARY 2006–REVISED JANUARY 2010 www.ti.com
When TPS2363 is enabled using SMBus for control, this bit needs to be cleared by the master – ECHO RESET
condition. i.e., a “1” is written into this bit by the master. Once this is done, pin INT will be de-asserted i.e., it
goes high.
3VFA/B : This bit indicates an over current fault condition on 3.3 V out – A
• 1 – There is an over current condition on 3.3 V out A i.e.,
– Normal over current and timeout or
– Normal over current and TSHUT1 or
– Fast trip.
• 0 – No over current condition.
When TPS2363 is enabled using SMBUS for control, this bit needs to be cleared by the master – ECHO RESET
condition. i.e., a “1” is written into this bit by the master. Once this is done, pin -INT will be de-asserted i.e., it
goes high.
Table 10. Common Status Register (06h) : Default 00h
GPI-B2 GPI-A2 GPI-B1 GPI-A1 INTMASK UV_INT OT_INT RSVD
R R R R R/W R/W R/W R
Valid write commands: Write commands are used to clear faults due to UVLO, otsd2.
• 00, 02, 04, 06, 08, 0a, 0c, 0e
Valid read commands: 0Y through fY (Y corresponds to any of the combinations above).
GPI_B2/GPI_A2/GPI_B1/GPI_A1 : These bit indicate the status of GPIx pins after a deglitch of 5 ms.
• 1 – GPIA/B pins are high.
• 0 – GPIA/B pins are low.
INTMASK: (Active low).
• 1 – INT pin is disabled.
• 0 – INT pin is enabled.
When this bit is 0 and there is a fault on (any of the channels), INT pin goes low.
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