TEXAS INSTRUMENTS PMIC - hot swap controller ATCA, MicroTCA™ VQFN 36 Surface-mount : Datasheet : Page 41

TPS2359

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SLUS792H –FEBRUARY 2008–REVISED MAY 2013

Register Write: Figure 30 Format of a Register Writeshows the format of a register write. First the master issues

a start condition, followed by a seven-bit I

2

C address. Next the master writes a zero to signify that it wishes to

conduct a write operation. Upon receiving an acknowledge from the slave, the master writes the eight-bit register

number across the bus. Following a second acknowledge, the master writes the eight-bit data value for the

register across the bus. Upon receiving a third acknowledge, the master issues a stop condition. This action

concludes the register write.

Figure 30. Format of a Register Write. Shaded Regions Denote Bus Control by TPS2358/9

Register Read: Figure 31 Format of a Register Read shows the format of a register read. First the master issues

a start condition followed by a seven-bit I

2

C address. Next, the master writes a zero to signify that it will conduct

a write operation. Upon receiving an acknowledge from the slave, the master writes the eight-bit register number

across the bus. Following a second acknowledge, the master issues a repeat start condition. Then the master

issues a seven-bit I

2

C address followed by a one to signify that it will conduct a read operation. Upon receiving a

third acknowledge, the master releases the bus to the TPS2359. The TPS2359 then writes the eight-bit data

value from the register across the bus. The master acknowledges receiving this byte and issues a stop condition.

This action concludes the register read.

Figure 31. Format of a Register Read. Shaded Regions Denote Bus Control by TPS2358/9

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