Datasheet

TPS2359
SLUS792H –FEBRUARY 2008–REVISED MAY 2013 www.ti.com
TPS2359 I
2
C Interface
The TPS2359 digital interface meets the specifications for an I
2
C bus operating in the high-speed mode. One can
configure the interface to recognize any one of 27 separate I
2
C addresses using the A0, A1, and A2 pins
(Table 17 I
2
C Addressing). These pins accept any of three distinct voltage levels. Connecting a pin to ground
generates a low level (L). Connecting a pin to VINT generates a high level (H). Leaving a pin floating generates a
no-connect level (NC).
Table 17. I
2
C Addressing
EXTERNAL PINS I
2
C (Device) ADDRESS
A2 A1 A0 Dec Hex Binary
L L L 8 8 1000
L L NC 9 9 1001
L L H 10 0A 1010
L NC L 11 0B 1011
L NC NC 12 0C 1100
L NC H 13 0D 1101
L H L 14 0E 1110
L H NC 15 0F 1111
L H H 16 10 10000
NC L L 17 11 10001
NC L NC 18 12 10010
NC L H 19 13 10011
NC NC L 20 14 10100
NC NC NC 21 15 10101
NC NC H 22 16 10110
NC H L 23 17 10111
NC H NC 24 18 11000
NC H H 25 19 11001
H L L 26 1A 11010
H L NC 27 1B 11011
H L H 28 1C 11100
H NC L 29 1D 11101
H NC NC 30 1E 11110
H NC H 31 1F 11111
H H L 32 20 100000
H H NC 33 21 100001
H H H 34 22 100010
The I
2
C hardware interface consists of two wires known as serial data (SDA) and serial clock (SCL). The
interface is designed to operate from a nominal 3.3-V supply. SDA is a bidirectional wired-OR bus that requires
an external pullup resistor, typically a 2.2-kΩ resistor connected from SDA to the 3.3-V supply.
The I
2
C protocol assumes one device on the bus acts as a master and another device acts as a slave. The
TPS2359 supports only slave operation with two basic functions called register write and register read.
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