Datasheet

12
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fault IN x CL
P . V I» ×
TPS2359
www.ti.com SLUS792H –FEBRUARY 2008–REVISED MAY 2013
Internal Bleed-Down Resistors and Bleed-Down Thresholds
The TPS2359 includes two features intended to support downstream loads that require removal and
reapplication of power to properly reset their internal circuitry. Disabling and re-enabling a channel of the
TPS2359 will not necessarily reset such a load because the capacitance attached to the output bus may not fully
discharge.
The TPS2359 includes four bleed down comparators that monitor the output rails through pins OUT12A,
OUT12B, OUT3A, and OUT3B. The I
2
C interface includes four bits that enable these comparators — 3ADS,
3BDS, 12ADS, and 12BDS. Enabling a bleed down comparator prevents its corresponding channel from turning
on until the output voltage drops below about 100 mV. This precaution ensures that the output rail drops so low
that all downstream loads properly reset.
In case the downstream load cannot quickly bleed off charge from the output capacitance, the TPS2359 also
includes bleed down resistors connected to each output rail through pins OUT12A, OUT12B, OUT3A, and
OUT3B. Internal switches connect these resistors from their corresponding rails to ground when the channels are
disabled, providing that one sets the appropriate bits in the I2C interface. These bits are named 12AUV, 12BUV,
3AUV, and 3BUV. Clearing these bits ensures that the corresponding resistors never connect to their buses.
If redundant supplies connect to an output, then one should clear the corresponding bleed-down threshold and
bleed-down resistor bits. Failing to clear the bleed-down threshold bit will prevent the channel from enabling so
long as the redundant supply continues to hold up the output rail. Failing to clear the bleed-down resistor bit will
cause current to continually flow through the resistor when the TPS2359 is disabled and the redundant supply
holds up the output bus.
Fault Timer Programming
Each of the TPS2359's four channels includes a fault timer. This timer is counting whenever V
GS
of the FET is
less than 6 ±1 V. If the channel remains in current limit so long that the fault timer runs out, then the channel
turns off the pass FET and reports a fault condition by means of the xFLT bit in the I
2
C interface.
The four fault timers are independently programmable from 0.45 to 13.95 ms in steps of 0.45 ms using the
appropriate xFT bits. A code of xFT = 00001B corresponds to a time of 0.45 ms. The code xFT = 00000B should
not be used.
The locations of the fault timer programming bits are:
Table 16. Fault Time Control Bits
REGISTER [bit]
CHANNEL
7.2 ms 3.6 ms 1.8 ms 0.9 ms 0.45 ms
12A R1[4] R1[3] R1[2] R1[1] R1[0]
12B R4[4] R4[3] R4[2] R4[1] R4[0]
3A R2[4] R2[3] R2[2] R2[1] R2[0]
3B R5[4] R5[3] R5[2] R5[1] R5[0]
The user should select the shortest fault times sufficient to allow down-stream loads and bulk capacitors to
charge. Shorter fault times reduce the stresses imposed on the pass FETs under fault conditions. This
consideration may allow the use of smaller and less expensive pass FETs for the 12-V channels.
The TPS2359 supports two modes of fault timer operation. Clearing the FLTMODE bit causes a channel to latch
off whenever its fault timer runs out. The channel remains off until it has been disabled and re-enabled (see
Enable Functions section). The TPS2359 operates in this manner by default. Setting the FLTMODE bit causes a
faulted channel to automatically attempt to turn back on after a delay roughly one hundred times the fault time.
This process repeats until either the fault disappears or the user disables the channel. The pass FET for a 12-V
channel with a shorted output must therefore continuously dissipate
(9)
where VIN12x equals the voltage present at the input of the 12-V channel and I
CL
equals the current limit setting
for this channel (the inrush current if 12VNRS is set).
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