Datasheet

TPS2359

SLUS792H –FEBRUARY 2008–REVISED MAY 2013

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Table 10. Register 7: Latched IRPT Channel Status Indicators (Read-only, cleared on read)

BIT NAME DEFAULT DESCRIPTION

0 12APG 1 Latches high when OUT12A goes from above V

TH_PG

to below V

TH_PG

1 12AFLT 0 Latches high when 12A fault timer has run out.

2 3APG 1 Latches high when OUT3A goes from above V

TH_PG

to below V

TH_PG

3 3AFLT 0 Latches high when 3A fault timer has run out.

4 12BPG 1 Latches high when OUT12B goes from above V

TH_PG

to below V

TH_PG

5 12BFLT 0 Latches high when 12B fault timer has run out.

6 3BPG 1 Latches high when OUT3B goes from above V

TH_PG

to below V

TH_PG

7 3BFLT 0 Latches high when 3B fault timer has run out.

12APG This bit is set at startup and each time OUT12A drops below the PG threshold set by the 12APG[1:0]

bits. It is cleared on read if OUT12A is above the PG threshold. If AIRM = 0, setting this bit asserts the IRPT pin.

12AFLT This bit is set if the fault timer on channel 12A has run out, and it remains set until Register 7 is read. If

AIRM = 0, setting this bit asserts the IRPT pin.

3APG This bit is set at startup and each time OUT3A drops below the PG threshold. It is cleared on read if

OUT3A is above the PG threshold. If AIRM = 0, setting this bit asserts the IRPT pin.

3AFLT This bit is set if the fault timer on channel 3A has run out, and it remains set until Register 7 is read. If

AIRM = 0, setting this bit asserts the IRPT pin.

12BPG This bit is set at startup and each time OUT12B drops below the PG threshold set by the 12BAPG[1:0]

bits. It is cleared on read if OUT12B is above the PG threshold. If BIRM = 0, setting this bit asserts the IRPT pin.

12BFLT This bit is set if the fault timer on channel 12B has run out, and it remains set until Register 7 is read. If

BIRM = 0, setting this bit asserts the IRPT pin.

3BPG This bit is set at startup and each time OUT3B drops below the PG threshold.It is cleared on read if

OUT3B is above the PG threshold. If BIRM = 0, setting this bit asserts the IRPT pin.

3BFLT This bit is set if the fault timer on channel 3B has run out, and it remains set until Register 7 is read. If

BIRM = 0, setting this bit asserts the IRPT pin.

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