Datasheet

TPS2300
TPS2301
www.ti.com SLVS265H –FEBRUARY 2000–REVISED JULY 2013
Table 2. Terminal Functions (continued)
TERMINAL
I/O DESCRIPTION
NAME NO.
ISET2 14 I Adjusts circuit-breaker threshold with resistor connected to IN2
PWRGD1 17 O Open-drain output, asserted low when VSENSE1 voltage is less than reference.
PWRGD2 13 O Open-drain output, asserted low when VSENSE2 voltage is less than reference.
TIMER 4 O Adjusts circuit-breaker deglitch time
VREG 5 O Connects to bypass capacitor, for stable operation
VSENSE1 7 I Power-good sense input channel 1
VSENSE2 6 I Power-good sense input channel 2
DETAILED DESCRIPTION
DISCH1, DISCH2 – DISCH1 and DISCH2 should be connected to the sources of the external N-channel
MOSFET transistors connected to GATE1 and GATE2, respectively. These pins discharge the loads when the
MOSFET transistors are disabled. They also serve as reference-voltage connections for internal gate voltage-
clamp circuitry.
ENABLE or ENABLE – ENABLE for TPS2300 is active-low. ENABLE for TPS2301 is active-high. When the
controller is enabled, both GATE1 and GATE2 voltages powers up to turn on the external MOSFETs. When the
ENABLE pin is pulled high for TPS2300 or the ENABLE pin is pulled low for TPS2301 for more than 50 µs, the
gate of the MOSFET is discharged at a controlled rate by a current source, and a transistor is enabled to
discharge the output bulk capacitance. In addition, the device turns on the internal regulator PREREG (see
VREG) when enabled and shuts down PREREG when disabled so that total supply current is less than 5 μA.
FAULT – FAULT is an open-drain overcurrent flag output. When an overcurrent condition in either channel is
sustained long enough to charge TIMER to 0.5 V, the overcurrent channel latches off and pulls this pin low. The
other channel runs normally if not in overcurrent. In order to turn the channel back on, either the enable pin has
to be toggled or the input power has to be cycled.
GATE1, GATE2 – GATE1 and GATE2 connect to the gates of external N-channel MOSFET transistors. When
the device is enabled, internal charge-pump circuitry pulls these pins up by sourcing approximately 15 μA to
each. The turnon slew rates depend upon the capacitance present at the GATE1 and GATE2 terminals. If
desired, the turnon slew rates can be further reduced by connecting capacitors between these pins and ground.
These capacitors also reduce inrush current and protect the device from false overcurrent triggering during
power up. The charge-pump circuitry generates gate-to-source voltages of 9 V–12 V across the external
MOSFET transistors.
IN1, IN2 – IN1 and IN2 should be connected to the power sources driving the external N-channel MOSFET
transistors connected to GATE1 and GATE2, respectively. The TPS2300/TPS2301 draws its operating current
from IN1, and both channels remains disabled until the IN1 power supply has been established. The IN1 channel
has been constructed to support 3-V, 5-V, or 12-V operation, while the IN2 channel has been constructed to
support 3-V or 5-V operation
ISENSE1, ISENSE2, ISET1, ISET2 – ISENSE1 and ISENSE2, in combination with ISET1 and ISET2, implement
overcurrent sensing for GATE1 and GATE2. ISET1 and ISET2 set the magnitude of the current that generates
an overcurrent fault, through external resistors connected to ISET1 and ISET2. An internal current source draws
50 μA from ISET1 and ISET2. With a sense resistor from IN1 to ISENSE1 or from IN2 to ISENSE2, which is also
connected to the drains of external MOSFETs, the voltage on the sense resistor reflects the load current. An
overcurrent condition is assumed to exist if ISENSE1 is pulled below ISET1 or if ISENSE2 is pulled below ISET2.
To ensure proper circuit breaker operation, V
I(ISENSE1)
and V
I(ISET1)
should never exceed V
I(IN1)
. Similarly,
V
I(ISENSE2)
and V
I(ISET2)
should never exceed V
I(IN2)
.
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