Datasheet

TPS22946
SLVS984A –SEPTEMBER 2009–REVISED FEBRUARY 2010 www.ti.com
CL Control Pin
The TPS22946 supports three current limits: 30 mA, 70 mA, and 155 mA. The current limit selection is
determined by the status of the digital input CL pin, as shown in Table 3. A high impedance, or floating, condition
allows the CL pin to support a third state. The TPS22946 monitors the state of the CL pin during start-up from a
disabled state, and upon start-up sets the current limit accordingly. When floating the CL pin, keep the total
capacitance on the pin less than 100 pF and the resistive loading greater than 10 MΩ to ensure proper
operation. Any changes to the state of the CL pin after the start-up operation has completed are ignored until the
next start-up cycle.
The CL pin must be driven with logic levels referenced to VIN. The CL pin can be tied high or low on the printed
wiring board (PWB) or driven by a general purpose I/O (GPIO), as long as the V
IL
and V
IH
recommended
operating conditions are met.
Table 3. CL Control Pin
CL PIN STATUS CURRENT LIMIT
Logic low
(1)
70 mA
Float
(2)
30 mA
Logic high
(1)
155 mA
(1) Resistance to VCC or GND < 100 Ω
(2) Load on CL: C < 100 pF, R > 10 MΩ
Figure 32. CL Pin Read Timing When cycling VIN (ON Pin Tied to VIN)
Figure 33. CL Pin Read Timing Cycling ON Pin (VIN High)
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