Datasheet

Power
Supply
LO
HI
TPS22910A,
TPS22912C,
TPS22913B/C
VIN
ON
C
IN
V
OUT
C
L
GND
GND
R
L
TPS22910A
,
TPS22912C
,
TPS22913B
,
TPS22913C
www.ti.com
SLVSB49D NOVEMBER 2011REVISED MAY 2014
11 Application and Implementation
11.1 Application Information
This section will highlight some of the design considerations when implementing this device in various
applications. A PSPICE model for this device is also available in the product page of this device on www.ti.com
for further aid.
11.1.1 VIN to VOUT Voltage Drop
The VIN to VOUT voltage drop in the device is determined by the R
ON
of the device and the load current. The
R
ON
of the device depends upon the VIN condition of the device. Refer to the R
ON
specification of the device in
the Electrical Characteristics table of this datasheet. Once the R
ON
of the device is determined based upon the
VIN conditions, use Equation 1 to calculate the VIN to VOUT voltage drop:
ΔV = I
LOAD
× R
ON
(1)
Where,
ΔV = Voltage drop from VIN to VOUT
I
LOAD
= Load current
R
ON
= On-resistance of the device for a specific V
IN
An appropriate I
LOAD
must be chosen such that the I
MAX
specification of the device is not violated.
11.1.2 On/Off Control
The ON pin controls the state of the switch. The ON pin has a low threshold, making it capable of interfacing with
low-voltage signals. The ON pin is compatible with standard GPIO logic thresholds. It can be used with any
microcontroller with 1.2 V or higher GPIO voltage. This pin cannot be left floating and must be driven either high
or low for proper functionality.
11.1.3 Input Capacitor (Optional)
To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor or short-circuit, a capacitor needs to be placed between V
IN
and GND. A 1-µF ceramic
capacitor, C
IN
, placed close to the pins, is usually sufficient. Higher values of C
IN
can be used to further reduce
the voltage drop during high current applications. When switching heavy loads, it is recommended to have an
input capacitor about 10 times higher than the output capacitor to avoid excessive voltage drop.
11.1.4 Output Capacitor (Optional)
Due to the integrated body diode in the PMOS switch, a C
IN
greater than CL is highly recommended. A C
L
greater than C
IN
can cause V
OUT
to exceed V
IN
when the system supply is removed. This could result in current
flow through the body diode from V
OUT
to V
IN
. A C
IN
to C
L
ratio of 10 to 1 is recommended for minimizing VIN dip
caused by inrush currents during startup, however a 10 to 1 ratio for capacitance is not required for proper
functionality of the device. A ratio smaller than 10 to 1 (such as 1 to 1) could cause slightly more V
IN
dip upon
turn-on due to inrush currents. This can be mitigated by using a device with a longer rise time.
11.2 Typical Application
Figure 49. Typical Application
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