Datasheet

  
   
   
SLVS317 − MAY 2001
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
D10
D9
D8 D7
D6
D5
D4 D3
D2
DATA
LATCH
CLOCK
D1
D0
Data Setup Time Data Hold Time Latch Delay Time
Clock Delay Time
NOTE: Data is clocked in on the positive edge of the clock. The positive edge of the latch signal should occur before the next positive edge of
the clock. For definition of D0 to D10, see the control logic table.
Figure 2. Serial-Interface Timing for TPS2226
Table of Graphs
FIGURE
Short-circuit response, short applied to powered-on 5-V xVCC-switch output vs Time 3
Short-circuit response, short applied to powered-on 12-V xVPP-switch output vs Time 4
OC response with ramped overcurrent-limit load on 5-V xVCC-switch output vs Time 5
OC response with ramped overcurrent-limit load on 12-V xVPP-switch output vs Time 6
xVCC Turnon propagation delay time (C
L
= 150 µF) vs Junction temperature 7
xVCC Turnoff propagation delay time (C
L
= 150 µF) vs Junction temperature 8
xVPP Turnon propagation delay time (C
L
= 10 µF) vs Junction temperature 9
xVPP Turnoff propagation delay time (C
L
= 10 µF) vs Junction temperature 10
xVCC Turnon propagation delay time (T
J
= 25°C) vs Load capacitance 11
xVCC Turnoff propagation delay time (T
J
= 25°C) vs Load capacitance 12
xVPP Turnon propagation delay time (T
J
= 25°C) vs Load capacitance 13
xVPP Turnoff propagation delay time (T
J
= 25°C) vs Load capacitance 14
xVCC Rise time (C
L
= 150 µF) vs Junction temperature 15
xVCC Fall time (C
L
= 150 µF) vs Junction temperature 16
xVPP Rise time (C
L
= 10 µF) vs Junction temperature 17
xVPP Fall time (C
L
= 10 µF) vs Junction temperature 18
xVCC Rise time (T
J
= 25°C) vs Load capacitance 19
xVCC Fall time (T
J
= 25°C) vs Load capacitance 20
xVPP Rise time (T
J
= 25°C) vs Load capacitance 21
xVPP Fall time (T
J
= 25°C) vs Load capacitance 22