Datasheet

  
   
   
SLVS317 − MAY 2001
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
ESD protections (see Figure 35)
All inputs and outputs of these devices incorporate ESD-protection circuitry designed to withstand a 2-kV
human-body-model discharge as defined in MIL-STD-883C, Method 3015. The xVCC and xVPP outputs can
be exposed to potentially higher discharges from the external environment through the PC Card connector.
Bypassing the outputs with 0.1-µF capacitors protects the devices from discharges up to 10 kV.
†
Maximum recommended output capacitance for xVCC is 220 µF including card capacitance, and for xVPP is 10 µF, without OC
glitch when
switches are powered on.
TPS2226
V
CC
BVPP
BVCC
BVCC
AVPP
AVCC
AVCC
LATCH
CLOCK
DATA
OC
RESET
V
CC
0.1 µF
†
0.1 µF
†
V
pp1
V
pp2
PC Card
Connector A
V
CC
V
CC
0.1 µF
†
0.1 µF
†
V
pp1
V
pp2
PC Card
Connector B
DATA
CLOCK
LATCH
GPI/O
Controller
From PCI or
System RST
12 V
3.3 V
5 V
12 V
3.3 V
5 V
12 V
3.3 V
3.3 V
5 V
0.1 µF
0.1 µF
0.1 µF
4.7 µF
4.7 µF
4.7 µF
5 V
Figure 35. Detailed Interconnections and Capacitor Recommendations