Datasheet

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 
SLVS399A − JANUARY 2002 − REVISED MAY 2006
9
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electrical characteristics over recommended operating junction temperature range,
V
I(SW_IN)
= 3.3 V for TPS2140/50, V
I(SW_IN)
= 5 V for TPS2141/51, V
I(LDO_IN)
= 5 V, all outputs unloaded
(unless otherwise noted) (continued)
adjustable voltage regulator (V
set
= 0.9 V to 3.3 V)
PARAMETER TEST CONDITIONS
MIN
TYP MAX UNIT
V
O(LDO_OUT)
Output voltage total tolerance
V
I(LDO_IN)
= V
set
+ 0.6 V to 5.5 V and
V
I(LDO_IN)
> 2.7 V, I
O(LDO_OUT)
= 5 mA to
250 mA
−4% 3%
V
O(LDO_OUT)
Line regulation
V
I(LDO_IN)
= V
O(LDO_OUT)
+ 0.6 V to 5.5 V and
V
I(LDO_IN)
> 2.7 V, I
O(LDO_OUT)
= 5 mA
0.03 0.1 %/V
V
O(LDO_OUT)
Load regulation
V
I(LDO_IN)
=V
O(LDO_OUT)
+ 0.6 V to 5.5 V and
V
I(LDO_IN)
> 2.7 V, I
O(LDO_OUT)
= 5 mA to
250 mA ( a percentage of V
set
)
0.6% 1.3%
V
SET
Regulated output voltage set
range
V
I(LDO_IN)
≥ V
O(LDO_OUT)
+ 0.6 V
V
I(LDO_IN)
≥ 2.7 V, I
O(LDO_OUT)
= 0 mA to
250 mA
0.9 3.3 V
V
ref
ADJ reference voltage
0.8 V
V
DROP
Drop-out voltage
V
I(LDO_IN)
– V
SET
= −0.1 V,
I
O(LDO_OUT)
= 250 mA
0.18 0.5 V
PSRR
Power supply rejection ratio,
20 log(Vac/Vo)
‡
Vac = 1 kHz sine wave, 100 mV
pp
superimposed on LDO_IN, C
L
= 4.7 µF,
ESR = 0.25 Ω, I
O
= 5 mA
50 dB
LDO current limit
Short circuit peak current
‡
LDO_OUT is enabled into a
short to ground
T
J
= −40°C
to 110°C
0.7 2 A
LDO current limit
Overload or short circuit dc
current limit
LDO_OUT is over-loaded or en-
abled into a short to ground
T
J
= −40°C
to 110°C
250
325 500 mA
LDO forward leakage
current I
LK_LDO
Current into pin LDO_OUT
V
O(LDO_OUT)
= 0 V, V
I(LDO_IN)
= 5.5 V,
V
I(EN_LDO)
= 0 V
10
A
LDO reverse leakage
current I
RLK_LDO
Current into pin LDO_OUT
V
O(LDO_OUT)
= 5.5 V, V
I(LDO_IN)
= 0 V,
V
I(EN_LDO)
= 0 V
10
µA
t
ON_LDO
Turnon time
From 50% V
I(EN_LDO)
to 90% V
O(LDO_OUT)
,
R
L
= V
O(LDO_OUT)
/0.2, C
L
= 10 µF (20%)
0.1
0.35 1
t
OFF_LDO
Turnoff time
From 50% V
I(EN_LDO)
to 10% V
O(LDO_OUT)
,
R
L
= V
O(LDO_OUT)
/0.2, C
L
= 10 µF (20%)
0.1
0.4 1
ms
V
O(LDO_OUT)
ramp-up time (0%
to 90%)
V
I(EN_LDO)
= 5V, V
I(LDO_IN)
ramping up from
10% to 90% in 0.1 ms, R
L
= V
O(LDO_OUT)
/0.2,
C
L
= 10 µF (20%)
0.1
0.65 1
ms
LDO pulldown transistor current
V
I(PLDN_LDO)
= 3.3 V 9 15
mA
LDO pulldown transistor current
V
I(LDO_PLDN)
= 1 V 5
mA
‡
Not tested in production.
undervoltage lockout, LDO_IN
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
LDO UVLO rising threshold 2.7 V
LDO UVLO falling threshold 2.25 2.45 V
UVLO hysteresis
‡
250 mV
‡
Not tested in production.