Datasheet
TPS2112A
TPS2113A
www.ti.com
SBVS045C –MARCH 2004–REVISED MAY 2012
DETAILED DESCRIPTION
AUTO-SWITCHING MODE
The TPS2112A/3A only supports the auto-switching mode. In this mode, OUT connects to IN1 if V
I(VSNS)
is
greater than 0.8 V, otherwise OUT connects to the higher of IN1 and IN2.
The VSNS terminal includes hysteresis equal to 3.75% to 7.5% of the threshold selected for transition from the
primary supply to the higher of the two supplies. This hysteresis helps avoid repeated switching from one supply
to the other due to resistive drops.
N-CHANNEL MOSFETs
Two internal high-side power MOSFETs implement a single-pole double-throw (SPDT) switch. Digital logic
selects the IN1 switch, IN2 switch, or no switch (Hi-Z state). The MOSFETs have no parallel diodes so output-to-
input current cannot flow when the FET is off. An integrated comparator prevents turn-on of a FET switch if the
output voltage is greater than the input voltage.
CROSS-CONDUCTION BLOCKING
The switching circuitry ensures that both power switches will never conduct at the same time. A comparator
monitors the gate-to-source voltage of each power FET and allows a FET to turn on only if the gate-to-source
voltage of the other FET is below the turn-on threshold voltage.
REVERSE-CONDUCTION BLOCKING
When the TPS211xA switches from a higher-voltage supply to a lower-voltage supply, current can potentially
flow back from the load capacitor into the lower-voltage supply. To minimize such reverse conduction, the
TPS211xA will not connect a supply to the output until the output voltage has fallen to within 100 mV of the
supply voltage. Once a supply has been connected to the output, it will remain connected regardless of output
voltage.
CHARGE PUMP
The higher of supplies IN1 and IN2 powers the internal charge pump. The charge pump provides power to the
current limit amplifier and allows the output FET gate voltage to be higher than the IN1 and IN2 supply voltages.
A gate voltage that is higher than the source voltage is necessary to turn on the N-channel FET.
CURRENT LIMITING
A resistor R
ILIM
from ILIM to GND sets the current limit to 250/R
ILIM
and 500/R
ILIM
for the TPS2112A and
TPS2113A, respectively. Setting resistor R
ILIM
equal to zero is not recommended as that disables current limiting.
OUTPUT VOLTAGE SLEW-RATE CONTROL
The TPS2112A/3A slews the output voltage at a slow rate when OUT switches to IN1 or IN2 from the Hi-Z state
(see the Truth Table). A slow slew rate limits the inrush current into the load capacitor. High inrush currents can
glitch the voltage bus and cause a system to hang up or reset. It can also cause reliability issues—like pit the
connector power contacts, when hot-plugging a load such as a PCI card. The TPS2112A/3A slews the output
voltage at a much faster rate when OUT switches between IN1 and IN2. The fast rate minimizes the output
voltage droop and reduces the output voltage hold-up capacitance requirement.
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