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ELECTRICAL CHARACTERISTICS
L(PG _ DLY ) ref
d
C V
t
Ch arg e Current
´
=
ELECTRICAL CHARACTERISTICS
TPS2070
TPS2071
SLVS287B – SEPTEMBER 2000 – REVISED SEPTEMBER 2007
over recommended operating junction temperature range, 4.5 V ≤ V
I(BP)
≤ 5.5 V, 4.85 V ≤ V
I(SP)
≤ 5.5 V, 6 V ≤ V
I(VEXT)
≤ 9 V,
ENx = 0 V, EN_REG = 0 V, BP_DIS = 0 V, C
L(3.3V_OUT)
= 10 μ F (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INTERNAL VOLTAGE REGULATOR
V
O
Output voltage, dc V
I(BP)
= 4.25 V to 5.5 V, I
O
= 5 mA to 100 mA 3.2 3.3 3.4 V
Dropout voltage I
O
= 100 mA 0.6 V
Line regulation V
I(BP)
= 4.25 V to 5.25 V, I
O
= 5 mA 0.1 %/V
Load regulation V
I(BP)
= 4.25 V, I
O
= 5 mA to 100 mA 0.6%
I
OS
Short-circuit current limit
(1)
V
I(BP)
= 4.25 V, 3.3V_OUT connected to GND 0.12 0.2 0.3 A
V
I(3.3V_OUT)
= 3.3 V 10
Pulldown current through transistor at
mA
3.3V_OUTPUT
(2)
V
I(3.3V_OUT)
= 1 V 5
f = 1 kHz, C
L(3.3V_OUT)
= 4.7 μ F, ESR = 0.25 Ω ,
PSRR Power-supply ripple rejection
(2)
40 dB
I
O
= 5 mA, V
I(BP)PP
= 100 mV
Low-level trip threshold voltage at PG 2.88 2.94 3 V
V
hys
Hysteresis voltage at PG
(2)
50 100 mV
V
OH
High-level output voltage at PG 4.25 V ≤ V
I(BP)
≤ 5.25 V, I
O
= 2 mA 2.4 V
V
OL
Low-level output voltage at PG 4.25 V ≤ V
I(BP)
≤ 5.25 V, I
O
= 3.2 mA 0.4 V
V
ref
Reference voltage at PG_DLY 1.22 V
Charge current at PG_DLY 3 μ A
t
d
Delay time at PG
(2) (3)
C
L(PG_DLY)
= 0.47 μ F 190 ms
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
(2) Specified by design, not tested in production.
(3) The PG delay time (t
d
) is calculated using the PG_DLY reference voltage and charge current:
over recommended operating junction temperature range, 4.5 V ≤ V
I(BP)
≤ 5.5 V, 4.85 V ≤ V
I(SP)
≤ 5.5 V, 6 V ≤ V
I(VEXT)
≤ 9 V,
ENx = 0 V, EN_REG = 3.3 V, BP_DIS = 0 V, C
L(SP)
= 220 μ F (unless otherwise noted))
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOLTAGE REGULATOR CONTROLLER
V
I(VEXT)
= 6 V, I
O(VCP)
= 5 mA,
V
O(CP)
Output voltage, charge pump 10 V
C
(CP_P)
= 10 nF, C
(VCP)
= 100 nF
6 V ≤ V
I(VEXT)
≤ 9 V, I
O(VCP)
= 5 mA,
f
osc
Oscillator frequency
(1)
850 kHz
V
O(VCP)
= 10 V
Sourcing V
I(VCP)
= 9 V, V
O(GATE)
= 7.5 V, V
I(SP)
= 4.5 V 500 μ A
Gate drive current
Sinking V
I(VCP)
= 9 V, V
O(GATE)
= 5.5 V, V
I(SP)
= 5.5 V 1.5 mA
Open-loop gain
(1)
V
I(VEXT)
= 6 V, 0.5 V ≤ V
O(GATE)
≤ 9 V 80 dB
Reference voltage at V
I(SP)
, using external
V
I(VEXT)
= 6 V to 9 V, IRLZ24N FET 4.9 5.1 5.25 V
regulator
Gate clamp voltage Gate to SP 10 V
(1) Specified by design, not tested in production.
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