Datasheet

TPS2052C, TPS2062C, TPS2062C-2
TPS2066C, TPS2066C-2, TPS2060C, TPS2064C
TPS2064C-2, TPS2002C, TPS2003C
www.ti.com SLVSAX6G –OCTOBER 2011–REVISED JANUARY 2013
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITANCE
Input and output capacitance improves the performance of the device. For all applications, a 0.1 µF or greater
ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local
noise de-coupling. The actual capacitance should be optimized for the particular application. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce the overshoot voltage from exceeding the absolute maximum voltage of the device during heavy
transients.
A 120 µF minimum output capacitance is required when implementing USB standard applications. Typically this
uses a 150 µF electrolytic capacitor. If the application does not require 120 µF of output capacitance, a minimum
of 10 µF ceramic capacitor on the output is recommended in order to reduce the transient negative voltage on
OUTx pin caused by load inductance during a short circuit. The transient negative voltage should be less than
1.5 V for 10 µs.
POWER DISSIPATION AND JUNCTION TEMPERATURE
It is good design practice to estimate power dissipation and maximum expected junction temperature of the
TPS20xxC and TPS20xxC-2 dual. The system designer can control choices of package, proximity to other power
dissipating devices, and printed circuit board (PCB) design based on these calculations. These have a direct
influence on maximum junction temperature. Other factors such as airflow and maximum ambient temperature
are often determined by system considerations.
Addition of extra PCB copper area around these devices is recommended to reduce the thermal impedance and
maintain the junction temperature as low as practical.
The following procedure requires iteration because power loss is due to the two internal MOSFETs 2 × I
2
×
r
DS(on)
, and r
DS(on)
is a function of the junction temperature. As an initial estimate, use the r
DS(on)
at 125°C from the
typical characteristics, and the preferred package thermal resistance for the preferred board construction from
the thermal parameters section.
T
J
= T
A
+ [(2 × I
OUT
2
× r
DS(on)
× θ
JA
]
Where:
I
OUT
= rated OUT pin current (A)
r
DS(on)
= Power switch on-resistance at an assumed T
J
(Ω)
T
A
= Maximum ambient temperature (°C)
T
J
= Maximum junction temperature (°C)
θ
JA
= Thermal resistance (°C/W)
If the calculated T
J
is substantially different from the original assumption, look up a new value of r
DS(on)
and
recalculate.
If the resulting T
J
is not less than 125°C, try a PCB construction and/or package with lower θ
JA
.
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Product Folder Links: TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C
TPS2064C-2 TPS2002C TPS2003C