Datasheet

TPS1120, TPS1120Y
DUAL P-CHANNEL ENHANCEMENT-MODE MOSFETS
SLVS080A – MARCH 1994 – REVISED AUGUST 1995
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
THERMAL INFORMATION
The profile of the heat sinks used for thermal measurements is shown in Figure 14. Board type is FR4 with 1-oz copper
and 1-oz tin/lead (63/37) plate. Use of vias or through-holes to enhance thermal conduction was avoided.
Figure 15 shows a family of R
θJA
curves. The R
θJA
was obtained for various areas of heat sinks while subject to air
flow. Power remained fixed at 0.25 W per device or 0.50 W per package. This testing was done at 25°C.
As Figure 14 illustrates, there are two separated heat sinks for each package. Each heat sink is coupled to the lead
that is internally tied to a single MOSFET source and is half the total area, as shown in Figure 15. For example, if the
total area shown in Figure 15 is 4 cm
2
, each heat sink is 2 cm
2
.
1DRAIN
2DRAIN
1SOURCE
1GATE
2GATE
The Combined Area
of These Two Heat
Sinks Is 4 cm
2
TPS1120D IC
HS: 4 cm
2
8P SOIC Thermal Analysis
≅ 2 cm
2SOURCE
Figure 14. Profile of Heat Sinks
70
60
50
0 50 100 150
80
90
THERMAL RESISTANCE, JUNCTION-TO-AMBIENT
vs
AIRFLOW, 25°C
100
200 250 300
Airflow, 25°C – ft/min
110
120
– Thermal Resistance, Junction-to-Ambient – C/W
R
θ
130
140
150
T
J
= 25°C
P = 0.5 W
Heat Sink Areas
as Shown
°
JA
0.5 cm
2
1 cm
2
2 cm
2
4 cm
2
0 cm
2
8 cm
2
Figure 15