Datasheet

TPL0202
SLIS135C –DECEMBER 2010–REVISED JUNE 2012 www.ti.com
Table 2. PIN DESCRIPTION TABLE
16 RTE 14 RUC
I/O DESCRIPTION I/O DESCRIPTION
NO. NAME NO. NAME
1 N.C. Not internally connected 1 VDD Power Supply Voltage
2 SCLK Input SPI Clock 2 SCLK Input SPI Clock
3 DIN Input SPI Input 3 DIN Input SPI Input
4 CS Input SPI Chip Select (Active Low) 4 CS Input SPI Chip Select (Active Low)
5 N.C. Not internally connected 5 GND Ground Ground
6 N.C. Not internally connected 6 LB I/O Low terminal of Potentiometer B
7 GND Ground Ground 7 WB I/O Wiper terminal of Potentiometer B
8 N.C. Not internally connected 8 HB I/O High terminal of Potentiometer B
9 N.C. Not internally connected 9 N.C. Not internally connected
10 LB I/O Low terminal of Potentiometer B 10 N.C. Not internally connected
11 WB I/O Wiper terminal of Potentiometer B 11 N.C. Not internally connected
12 HB I/O High terminal of Potentiometer B 12 LA I/O Low terminal of Potentiometer A
13 LA I/O Low terminal of Potentiometer A 13 WA I/O Wiper terminal of Potentiometer A
14 WA I/O Wiper terminal of Potentiometer A 14 HA I/O High terminal of Potentiometer A
15 HA I/O High terminal of Potentiometer A
16 N.C Not internally connected
Exposed Thermal Pad.
EP EP Can be connected to GND or left
unconnected.
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