Datasheet

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  
SLIS110A − APRIL 2003 − REVISED MAY 2005
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
Table 2. Default SPI Mode
NO. CODE COMMAND (t) DATA RESPONSE (t)
1 010 D[4:0] Set the prescaler and SDO status OSC
IN
frequency
D[4:1]=0000=> 4 MHz
D[4:1]=0001=> 5 MHz
D[4:1]=0010=> 6 MHz
D[4:1]=0011=> 8 MHz
D[4:1]=0100=> 10 MHz
D[4:1]=0101=> 12 MHz
D[4:1]=0110=> 16 MHz
D[4:1]=0111=> 20 MHz
D[4:1]=1000=> 24 MHz
D[0]=0 => SDO active
D[1]=1=> SDO high impedance
SDI
(010 D[4:0])
2 1110 000 D[0] Select the channel D[0]=0 => Channel 1 selected
D[1]=1=> Channel 2 selected
SDI
(1110 000 D[0])
3 00 D[5:0] Set the band-pass center frequency D[5:0] (see Table 1) SDI
(00 D[5:0])
4 10 D[5:0] Set the gain D[5:0] (see Table 1) SDI
(10 D[5:0])
5 110 D[4:0] Set the integration time constant D[4:0] (see Table 1) SDI
(100 D[4:0])
6 0111 0001 Set SPI configuration to the advanced mode None SDI
(0111 0001)
NOTE: Command #6 is to enter into the advanced mode.
advanced SPI mode
The advanced SPI mode has additional features to the default SPI mode. A control byte is written to the SDI
and shifted with the MSB first. The response byte on the SDO is shifted out with the MSB first. The response
byte corresponds to the previous command. Therefore, the SDI shifts in a control byte n and shifts out a
response command byte n−1. Each control/response pair of commands requires two full 8-bit shift cycles to
complete a transmission. The control bytes with the expected response are shown in Table 3.
In the advanced SPI mode, only a power-down condition may reset the SPI mode to the default state on the
subsequent power-up cycle.