Datasheet

TPIC6B259
POWER LOGIC 8-BIT ADDRESSABLE LATCH
SLIS030 – APRIL 1994 – REVISED JULY 1995
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SWITCHING TIMES
G
D
5 V
0 V
5 V
0 V
50%
Output
24 V
0.5 V
90%
10%
t
PLH
t
r
50%
90%
10%
t
PHL
t
f
5 V
0 V
50%
D
5 V
0 V
50%
50%
t
su
t
h
t
w
INPUT SETUP AND HOLD WAVEFORMS
G
5 V
24 V
DUT
V
CC
CLR
DRAIN
GND
D
235 Ω
I
D
TEST CIRCUIT
Word
Generator
(see Note A)
G
C
L
= 30 pF
(see Note B)
Output
Word
Generator
(see Note A)
2
19
9, 10,11
13
18
4–7,
14–17
NOTES: A. The word generator has the following characteristics: t
r
≤ 10 ns, t
f
≤ 10 ns, t
w
= 300 ns, pulsed repetition rate (PRR) = 5 kHz,
Z
O
= 50 Ω.
B. C
L
includes probe and jig capacitance.
Figure 2. Test Circuit, Switching Times, and Voltage Waveforms
+
–
2500 µF
250 V
L = 1 mH
I
F
(see Note A)
R
G
V
GG
(see Note B)
Driver
TP A
50 Ω
Circuit
Under
Test
DRAIN
25 V
t
1
t
3
t
2
TP K
TEST CIRCUIT
0.1 A
I
F
0
I
RM
25% of I
RM
t
a
t
rr
di/dt = 20 A/µs
CURRENT WAVEFORM
NOTES: A. The DRAIN terminal under test is connected to the TP K test point. All other terminals are connected together and connected to the
TP A test point.
B. The V
GG
amplitude and R
G
are adjusted for di/dt = 20 A/µs. A V
GG
double-pulse train is used to set I
F
= 0.1 A, where t
1
= 10 µs,
t
2
= 7 µs, and t
3
= 3 µs.
Figure 3. Reverse-Recovery-Current Test Circuit and Waveforms of Source-to-Drain Diode