Datasheet


    
SLIS056A − FEBRUARY 1995 − REVISED MARCH 1996
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251−1443
PRINCIPLES OF OPERATION
fault sense/protection circuitry
over-current/short-to-battery sensing and protection
The internal fault protection circuitry of the TPIC2603 monitors the drain current for each channel. Each channel
offers two levels of protection from over-current conditions. The first level is a current-limit protection which
through the internal FET prevents the switching current from exceeding the on-state current limit. The second
level of protection transits the output to a low duty cycle PWM mode when the current exceeds the over-current
sense threshold. The PWM mode protection is enabled approximately 70 µs after the output has been turned
on. The output remains in the PWM mode until the shorted-load condition has been corrected and then
automatically returns to normal operation. Figure 5 illustrates device operation under an over-current or
shorted-load condition.
t
(stb)
t
(stb)
Glitches
Glitches
t
w(sense)
t
cyc(ref)
DRAIN
Control
Register
DRAIN
Fault
Register
NORMAL
SHORTED-LOAD
Control
Register
DRAIN
Fault
Register
Figure 5. Shorted-Load Condition