Datasheet

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TERMINAL FUNCTIONS
LIN Bus Pin
Transmit Input Pin (TXD)
Receive Output Pin (RXD)
TPIC1021
LIN Physical Interface
SLIS113C – OCTOBER 2004 – REVISED JULY 2005
Terminal Assignments
PIN NAME PIN NO. PIN TYPE DESCRIPTION
RXD 1 O RXD output (open drain) pin interface reporting state of LIN bus voltage
EN 2 I Enable input pin
NWake 3 I High voltage input pin for device wake up
TXD 4 I TXD input pin interface to control state of LIN output
GND 5 I Ground connection
LIN 6 I/O LIN bus pin single wire transmitter and receiver
V
SUP
7 Supply Device supply pin (connected to battery in series with external reverse blocking diode)
INH 8 O Inhibit pin controls external voltage regulator with inhibit input
This I/O pin is the single-wire LIN bus transmitter and receiver.
Transmitter Characteristics
The driver is a low side transistor with internal current limitation and thermal shutdown. There is an internal
30-k Ω pull-up resistor with a serial diode structure to V
sup
so no external pull-up components are required for LIN
slave mode applications. An external pull-up resistor of 1 k Ω plus a series diode to V
sup
must be added when the
device is used for master node applications.
Voltage on the LIN pin can go from -40 V to +40 V DC without any currents other than through the pull-up
resistance. There are no reverse currents from the LIN bus to supply (V
sup
), even in the event of a ground shift or
loss of supply (V
sup
).
The LIN thresholds and ac parameters are compatible LIN Protocol Specification Revision 2.0.
During a thermal shut down condition the driver is disabled.
Receiver Characteristics
The receiver’s characteristic thresholds are ratio-metric with the device supply pin. Typical thresholds are 50%,
with a hysteresis between 5% and 17.5% of supply.
This pin is the interface to the MCU’s LIN Protocol Controller or SCI/UART used to control the state of the LIN
output. When TXD is low, LIN output is dominant (near ground). When TXD is high, LIN output is recessive (near
battery). TXD input structure is compatible with microcontrollers with 3.3 V and 5.0 V I/O. This pin has an internal
pull-down resistor.
TXD Dominant State Timeout
If the TXD pin is inadvertently driven permanently low by a hardware or software application failure, the LIN bus
is protected by TPIC1021’s Dominant State Timeout Timer. This timer is triggered by a falling edge on the TXD
pin. If the low signal remains on the TXD pin for longer than t
DST
, the transmitter is disabled thus allowing the LIN
bus to return to the recessive state and communication to resume on the bus. The timer is reset by a rising edge
on TXD pin.
This pin is the interface to the MCU’s LIN Protocol Controller or SCI/UART, which reports the state of the LIN
bus voltage. LIN recessive (near battery) is represented by a high level on RXD and LIN dominant (near ground)
is represented by a low level on RXD. The RXD output structure is an open-drain output stage. This allows the
TPIC1021 to be used with 3.3 V and 5 V I/O microcontrollers. If the microcontroller’s RXD pin does not have an
integrated pull-up, an external pull-up resistor to the microcontroller I/O supply voltage is required.
2