Datasheet

805
Lin
PGND
VBAT
SW
402
Cin
603
Cout
5VOUT
402
Cvcca
GND
VCCA
Layer 1
Layer 2
TPD12S015
www.ti.com SLLSE19E –DECEMBER 2009–REVISED JUNE 2013
Table 1. Passive Components: Recommended Minimum Effective Values
COMPONENT MIN TARGET MAX UNIT
C
IN
1.2 4.7 6.5 μF
C
OUT
1.2 4.7 10 μF
L
IN
0.7 1 1.3 μH
Figure 3. Board Layout (DC-DC Components) (Top View)
List of components:
• L
IN
= MURATA LQM21PN1R0MC0 or L
IN
= Toko MDT2010-CN1R0
• C
IN
= MURATA GRM188R60J225ME19 (2.2 μF, 6.3 V, 0603, X5R) or MURATA GRM188R60J475ME19 (4.7
μF, 6.3 V, 0603, X5R)
• C
OUT
= MURATA GRM188R60J475ME19 (4.7 μF, 6.3 V, 0603, X5R)
• CV
CCA
= MURATA GRM155R60J104MA01 (0.1 μF, 6.3 V, 0402, X5R)
TPD12S015 EVM Layout
The TPD12S015 EVM has been designed for HDMI functional testing and includes both HDMI A-type and HDMI
C-type connectors. Board jumpers enable and disable the dc-dc and level shifting circuitry. There are two supply
terminals (VCCA and VBAT) and one GND terminal at the edge of the board. High speed lines were kept on top
and bottom layers and matched for 50 Ω line to GND. All the high speed lines are matched to minimize the skew.
The board has three test fixtures for testing the TPD12S015 in the following environments:
• The top segment enables system designers to test the TPD12S015 using the HDMI Class A connector
• The middle segment enables the system designers to test to test the TPD12S015 using the HDMI Class C
connector
• The bottom segment enables the system designers to test signal integrity and eye pattern using differential
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