Datasheet

TPD12S015A
SLLSE74C –JUNE 2011–REVISED MARCH 2013 www.ti.com
SWITCHING CHARACTERISTICS
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
C
L
Bus load capacitance (B side) 750 pF
Bus load capacitance (A side) 15
Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.2V
V
CCA
= 1.2 V
PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT
t
PHL
Propagation delay A to B DDC Channels Enabled 344
ns
B to A 355
t
PLH
Propagation delay A to B DDC Channels Enabled 452
ns
B to A 178
t
f
A port fall time A Port DDC Channels Enabled 138
ns
B port fall time B Port 83
t
r
A port rise time A Port DDC Channels Enabled 194
ns
B port rise time B Port 92
f
MAX
Maximum switching frequency DDC Channels Enabled 400 kHz
Voltage Level Shifter: CEC Line (x_A & x_B ports); VCCA = 1.2V
V
CCA
= 1.2 V
PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay A to B CEC Channels Enabled 445
ns
B to A 337
t
PLH
A to B 13
μs
B to A 0.266
t
f
A port fall time A Port CEC Channels Enabled 140
ns
B port fall time B Port 96
t
r
A port rise time A Port CEC Channels Enabled 202 ns
B port rise time B Port 15 μs
Voltage Level Shifter: HPD Line (x_A & x_B ports); VCCA = 1.2V
V
CCA
= 1.2 V
PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay B to A CEC Channels Enabled 10
μs
t
PLH
B to A 9
t
f
A port fall time A Port CEC Channels Enabled 0.67 ns
t
r
A port rise time A Port CEC Channels Enabled 0.74 ns
Voltage Level Shifter: SCL, SDA Lines (x_A & x_B ports); VCCA = 1.5V
V
CCA
= 1.5 V
PARAMETER PINS TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
Propagation delay A to B DDC Channels Enabled 335
B to A 265
ns
t
PLH
A to B 438
B to A 169
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