Datasheet

DEVICE PINOUT
1
HPVDD
CPP
INL-
INL+
INR+
INR-
PGND
CPN
2
3
4
12
11
10
9
16
15
14
13
5
6
7
8
OUTR
G0 G1
HPVSS
OUTL
SGND VDD EN
TPA6132A2
www.ti.com ........................................................................................................................................................................................... SLOS597 – DECEMBER 2008
RTE (QFN) PACKAGE
(TOP VIEW)
PIN FUNCTIONS
PIN
I/O/P PIN DESCRIPTION
NAME QFN
INL- 1 I Inverting left input for differential signals; left input for single-ended signals
INL+ 2 I Non-inverting left input for differential signals. Connect to ground for single-ended input applications
INR+ 3 I Non-inverting right input for differential signals. Connect to ground for single-ended input applications
INR- 4 I Inverting right input for differential signals; right input for single-ended signals
OUTR 5 O Right headphone amplifier output. Connect to right terminal of headphone jack
G0 6 I Gain select
G1 7 I Gain select
HPVSS 8 P Charge pump output and negative power supply for output amplifiers; connect 1 µ F capacitor to GND
CPN 9 P Charge pump negative flying cap. Connect to negative side of 1 µ F capacitor between CPP and CPN
PGND 10 P Ground
CPP 11 P Charge pump positive flying cap. Connect to positive side of 1 µ F capacitor between CPP and CPN
HPVDD 12 P Positive power supply for headphone amplifiers. Connect to a 2.2 µ F capacitor. Do not connect to VDD
EN 13 I Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate
VDD 14 P Positive power supply for TPA6132A2
SGND 15 I Amplifier reference voltage. Connect to ground terminal of headphone jack
OUTL 16 O Left headphone amplifier output. Connect to left terminal of headphone jack
Thermal – P Solder the exposed metal pad on the TPA6132A2RTE QFN package to the landing pad on the PCB.
Pad Connect the landing pad to ground or leave it electrically unconnected (floating).
Copyright © 2008, Texas Instruments Incorporated 3
Product Folder Link(s) :TPA6132A2