Datasheet

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DEVICE INFORMATION
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20
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LVCC−
LOUT
LVCC+
LIN+
LIN−
NC
NC
NC
NC
NC
RVCC−
ROUT
RVCC+
RIN+
RIN−
NC
NC
NC
NC
NC
NC − No internal connection
TPA6120A2
SLOS431 MARCH 2004
Thermally Enhansed SOIC (DWP)
PowerPAD™ Package
Top View
TERMINAL FUNCTIONS
PIN NAME PIN NUMBER I/O DESCRIPTION
Left channel negative power supply must be kept at the same potential as
LVCC- 1 I
RVCC-.
LOUT 2 O Left channel output
LVCC+ 3 I Left channel positive power supply
LIN+ 4 I Left channel positive input
LIN- 5 I Left channel negative input
NC 6,7,8,9,10,11,12,13,14,15 - Not internally connected
RIN- 16 I Right channel negative input
RIN+ 17 I Right channel positive input
RVCC+ 18 I Right channel positive power supply
ROUT 19 O Right channel output
Right channel negative power supply - must be kept at the same potential as
RVCC- 20 I
LVCC-.
Connect to ground. The thermal pad must be soldered down in all
Thermal Pad - -
applications to properly secure device on the PCB.
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