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DC CHARACTERISTICS
TIMING CHARACTERISTICS
(1) (2)
SCL
SDA
t
w(H)
t
w(L)
t
su1
t
h1
SCL
SDA
th2 t(buf)
tsu2 tsu3
StartCondition
StopCondition
TPA5050
SLOS492B – MAY 2006 – REVISED MAY 2007
T
A
= 25 ° C, V
DD
= 3 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
DD
Supply current V
DD
= 3.3 V, fs = 48 kHz, BCLK = 32 fs 1.5 3 mA
I
OH
High-level output current DATA_OUT = 2.6 V 7 13 mA
I
OL
Low-level output current DATA_OUT = 0.4 V 7 13 mA
DATA, LRCLK, BCLK, SCL, SDA, Vi = 5.5V, VDD = 3V 20
I
IH
High-level input current µ A
ADD[2:0], Vi = 3.6V, VDD = 3.6V 5
DATA, LRCLK, BCLK, SCL, SDA, ADD[2:0], Vi = 0V,
I
IL
Low-level input current 1 µ A
VDD = 3.6V
For I
2
C Interface Signals Over Recommended Operating Conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
SCL
Frequency, SCL No wait states 400 kHz
t
w(H)
Pulse duration, SCL high 0.6 µ s
t
w(L)
Pulse duration, SCL low 1.3 µ s
t
su1
Setup time, SDA to SCL 100 ns
t
h1
Hold time, SCL to SDA 10 ns
t
(buf)
Bus free time between stop and start condition 1.3 µ s
t
su2
Setup time, SCL to start condition 0.6 µ s
t
h2
Hold time, start condition to SCL 0.6 µ s
t
su3
Setup time, SCL to stop condition 0.6 µ s
(1) V
Pull-up
= V
DD
(2) A pull-up resistor ≤ 2 k Ω is required for a 5 V I
2
C bus voltage.
Figure 1. SCL and SDA Timing
Figure 2. Start and Stop Conditions Timing
4
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